[test] enable PWM channels closer to max power epoch in power virus test. Signed-off-by: Timothy Trippel <ttrippel@google.com>
diff --git a/sw/device/tests/power_virus_systemtest.c b/sw/device/tests/power_virus_systemtest.c index 71337e7..e875bbf 100644 --- a/sw/device/tests/power_virus_systemtest.c +++ b/sw/device/tests/power_virus_systemtest.c
@@ -841,10 +841,10 @@ .clock_divisor = kPwmClockDivisor, .beats_per_pulse_cycle = kPwmBeatsPerCycle, })); + CHECK_DIF_OK(dif_pwm_channel_set_enabled( + &pwm, (1u << PWM_PARAM_N_OUTPUTS) - 1, kDifToggleDisabled)); for (size_t i = 0; i < PWM_PARAM_N_OUTPUTS; ++i) { CHECK_DIF_OK( - dif_pwm_channel_set_enabled(&pwm, pwm_channels[i], kDifToggleDisabled)); - CHECK_DIF_OK( dif_pwm_configure_channel(&pwm, pwm_channels[i], (dif_pwm_channel_config_t){ .duty_cycle_a = kPwmOnBeats, @@ -855,8 +855,6 @@ .blink_parameter_x = 0, // unused .blink_parameter_y = 0, // unused })); - CHECK_DIF_OK( - dif_pwm_channel_set_enabled(&pwm, pwm_channels[i], kDifToggleEnabled)); } } @@ -1027,6 +1025,10 @@ LOG_INFO("Entering max power epoch ..."); + // Enable all PWM channels + mmio_region_write32(pwm.base_addr, PWM_PWM_EN_REG_OFFSET, + (1u << PWM_PARAM_N_OUTPUTS) - 1); + // Enable all UARTs and I2Cs. mmio_region_write32(uart_1.base_addr, UART_CTRL_REG_OFFSET, uart_ctrl_reg); mmio_region_write32(uart_2.base_addr, UART_CTRL_REG_OFFSET, uart_ctrl_reg);