[otp_ctrl] Add lint target

Signed-off-by: Michael Schaffner <msf@opentitan.org>
diff --git a/hw/ip/otp_ctrl/otp_ctrl.core b/hw/ip/otp_ctrl/otp_ctrl.core
index ca26e33..8170acc 100644
--- a/hw/ip/otp_ctrl/otp_ctrl.core
+++ b/hw/ip/otp_ctrl/otp_ctrl.core
@@ -10,11 +10,17 @@
     depend:
       - lowrisc:ip:tlul
       - lowrisc:prim:all
+      - lowrisc:prim:ram_1p
       - lowrisc:prim:otp
       - lowrisc:ip:otp_ctrl_pkg
     files:
       - rtl/otp_ctrl_reg_top.sv
+      - rtl/otp_ctrl_parity_reg.sv
       - rtl/otp_ctrl_scrmbl.sv
+      - rtl/otp_ctrl_dai.sv
+      - rtl/otp_ctrl_lci.sv
+      - rtl/otp_ctrl_part_unbuf.sv
+      - rtl/otp_ctrl_part_buf.sv
       - rtl/otp_ctrl.sv
     file_type: systemVerilogSource
 
diff --git a/hw/top_earlgrey/lint/top_earlgrey_lint_cfgs.hjson b/hw/top_earlgrey/lint/top_earlgrey_lint_cfgs.hjson
index 2e1f809..8253d82 100644
--- a/hw/top_earlgrey/lint/top_earlgrey_lint_cfgs.hjson
+++ b/hw/top_earlgrey/lint/top_earlgrey_lint_cfgs.hjson
@@ -66,6 +66,11 @@
                   import_cfgs: ["{proj_root}/hw/lint/data/common_lint_cfg.hjson"]
                   rel_path: "hw/ip/otbn/lint/{tool}"
              },
+             {    name: otp_ctrl
+                  fusesoc_core: lowrisc:ip:otp_ctrl
+                  import_cfgs: ["{proj_root}/hw/lint/data/common_lint_cfg.hjson"]
+                  rel_path: "hw/ip/otp_ctrl/lint/{tool}"
+             },
              {    name: padctrl
                   fusesoc_core: lowrisc:ip:padctrl
                   import_cfgs: ["{proj_root}/hw/lint/data/common_lint_cfg.hjson"]