[dv] Auto-gen byte write for RAL
Without update, we need to manually set partial write support for the
mem that supports it. If not, will see failure in tl_errors test.
Make it automatic to save time to debug this kind of issue
Signed-off-by: Weicai Yang <weicai@google.com>
diff --git a/util/topgen.py b/util/topgen.py
index da03d53..c7d29c9 100755
--- a/util/topgen.py
+++ b/util/topgen.py
@@ -815,6 +815,8 @@
mem.name = item["name"]
mem.base_addr = int(item["base_addr"], 0)
mem.limit_addr = int(item["base_addr"], 0) + int(item["size"], 0)
+ mem.byte_write = ('byte_write' in item and
+ item["byte_write"].lower() == "true")
if "swaccess" in item.keys():
mem.dvrights = item["swaccess"]
else:
