hw/ip/trial1/dv/trial1_sim_cfg.hjson

// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
{
  // Name of the sim cfg - typically same as the name of the DUT.
  name: trial1

  // Top level dut name (sv module).
  dut: trial1_reg_top

  // Top level testbench name (sv module).
  tb: tb

  // Simulator used to sign off this block
  tool: vcs

  // Fusesoc core file used for building the file list.
  fusesoc_core: lowrisc:ip:trial1_sim:0.1

  // Import additional common sim cfg files.
  import_cfgs: [// Project wide common sim cfg file
                "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson"]

  // Default iterations for all tests - each test entry can override this.
  reseed: 1

  // Default UVM test and seq class name.
  uvm_test: trial1_smoke
  //uvm_test_seq: trial1_base_vseq

  // List of test specifications.
  tests: [
    {
      name: trial1_smoke
    }
  ]

  // List of regressions.
  regressions: [
    {
      name: smoke
      tests: ["trial1_smoke"]
    }
  ]
}