Adjust `opentitan_functest` for hyperdebug Allow CW310 tests to specify `hyper310` as their interface, thereby instructing the test executor to dispatch the test via the hyperdebug interface instead of the CW310 native interface. Signed-off-by: Chris Frantz <cfrantz@google.com>
diff --git a/hw/bitstream/hyperdebug/BUILD b/hw/bitstream/hyperdebug/BUILD new file mode 100644 index 0000000..8d76dbc --- /dev/null +++ b/hw/bitstream/hyperdebug/BUILD
@@ -0,0 +1,108 @@ +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +load("//rules:splice.bzl", "bitstream_splice") +load("//rules:otp.bzl", "get_otp_images") + +package(default_visibility = ["//visibility:public"]) + +filegroup( + name = "test_rom", + testonly = True, + srcs = select({ + "//hw/bitstream:bitstream_skip": ["//hw/bitstream:skip.bit"], + "//hw/bitstream:bitstream_vivado": ["//hw/bitstream/vivado:fpga_cw310_test_rom"], + "//hw/bitstream:bitstream_gcp_splice": [":gcp_spliced_test_rom"], + "//conditions:default": [":gcp_spliced_test_rom"], + }), + tags = ["manual"], +) + +filegroup( + name = "rom", + testonly = True, + srcs = select({ + "//hw/bitstream:bitstream_skip": ["skip.bit"], + "//hw/bitstream:bitstream_vivado": ["//hw/bitstream/vivado:fpga_cw310_rom"], + "//hw/bitstream:bitstream_gcp_splice": [":gcp_spliced_rom"], + "//conditions:default": [":gcp_spliced_rom"], + }), + tags = ["manual"], +) + +filegroup( + name = "rom_mmi", + testonly = True, + srcs = select({ + "//hw/bitstream:bitstream_skip": ["skip.bit"], + "//hw/bitstream:bitstream_vivado": ["//hw/bitstream/vivado:rom_mmi"], + "//conditions:default": ["@bitstreams//:chip_earlgrey_cw310_hyperdebug_rom_mmi"], + }), + tags = ["manual"], +) + +filegroup( + name = "otp_mmi", + testonly = True, + srcs = select({ + "//hw/bitstream:bitstream_skip": ["skip.bit"], + "//hw/bitstream:bitstream_vivado": ["//hw/bitstream/vivado:otp_mmi"], + "//conditions:default": ["@bitstreams//:chip_earlgrey_cw310_hyperdebug_otp_mmi"], + }), + tags = ["manual"], +) + +[ + filegroup( + name = "rom_otp_" + otp_name, + testonly = True, + srcs = select({ + "//hw/bitstream:bitstream_skip": ["skip.bit"], + "//hw/bitstream:bitstream_vivado": ["//hw/bitstream/vivado:fpga_cw310_rom_otp_" + otp_name], + "//hw/bitstream:bitstream_gcp_splice": [":gcp_spliced_rom_otp_" + otp_name], + "//conditions:default": [":gcp_spliced_rom_otp_" + otp_name], + }), + tags = ["manual"], + ) + for (otp_name, _) in get_otp_images() +] + +# Build the Test ROM and splice it into a cached bitstream. +bitstream_splice( + name = "gcp_spliced_test_rom", + testonly = True, + src = "@bitstreams//:chip_earlgrey_cw310_hyperdebug_bitstream", + data = "//sw/device/lib/testing/test_rom:test_rom_fpga_cw310_scr_vmem", + meminfo = ":rom_mmi", + tags = ["manual"], + update_usr_access = True, + visibility = ["//visibility:private"], +) + +# Build the ROM and splice it into a cached bitstream. +bitstream_splice( + name = "gcp_spliced_rom", + testonly = True, + src = "@bitstreams//:chip_earlgrey_cw310_hyperdebug_bitstream", + data = "//sw/device/silicon_creator/rom:rom_with_fake_keys_fpga_cw310_scr_vmem", + meminfo = ":rom_mmi", + tags = ["manual"], + update_usr_access = True, + visibility = ["//visibility:private"], +) + +# Splice OTP images into the locally-spliced ROM bitstream. +[ + bitstream_splice( + name = "gcp_spliced_rom_otp_" + otp_name, + testonly = True, + src = ":gcp_spliced_rom", + data = img_target, + meminfo = ":otp_mmi", + tags = ["manual"], + update_usr_access = True, + visibility = ["//visibility:private"], + ) + for (otp_name, img_target) in get_otp_images() +]
diff --git a/rules/opentitan_test.bzl b/rules/opentitan_test.bzl index 77ac8f5..619a2c5 100644 --- a/rules/opentitan_test.bzl +++ b/rules/opentitan_test.bzl
@@ -201,6 +201,8 @@ @param args: Extra arguments to pass the test runner `opentitantool`. @param data: Data dependencies of the test. @param local: Whether the test should be run locally without sandboxing. + @param interface: Which communication interface to use with the CW310 + board. Choices are "cw310" or "hyper310". @param otp: The OTP image to use. @param tags: The test tags to apply to the test rule. @param test_cmds: A list of required commands and args that make up the @@ -213,6 +215,9 @@ bitstream that is loaded into the FPGA. @param clear_bitstream: Clear FPGA bitstream at the end of the test. """ + if interface not in ("cw310", "hyper310"): + fail("The interface must be either 'cw310' or 'hyper310'") + default_args = [ "--rcfile=", "--logging={logging}", @@ -221,7 +226,7 @@ "--interface={}".format(interface), ] required_tags = [ - "cw310", + interface, "exclusive", ] kwargs.update( @@ -230,6 +235,7 @@ exit_success = exit_success, exit_failure = exit_failure, local = local, + interface = interface, otp = otp, tags = required_tags + tags, test_runner = test_runner, @@ -322,10 +328,16 @@ # If the cw310 parameter was not provided or was provided without # the bitstream field, determine the bitstream argument based on # the target. Otherwise, use the provided bitstream argument. - DEFAULT_BITSTREAM = { - "cw310_test_rom": "@//hw/bitstream:test_rom", - "cw310_rom": "@//hw/bitstream:rom", - } + if cw310_["interface"] == "cw310": + DEFAULT_BITSTREAM = { + "cw310_test_rom": "@//hw/bitstream:test_rom", + "cw310_rom": "@//hw/bitstream:rom", + } + else: + DEFAULT_BITSTREAM = { + "cw310_test_rom": "@//hw/bitstream/hyperdebug:test_rom", + "cw310_rom": "@//hw/bitstream/hyperdebug:rom", + } if (cw310 == None) or (cw310.get("bitstream") == None): cw310_["bitstream"] = DEFAULT_BITSTREAM[target] @@ -463,6 +475,8 @@ ######################################################################## # Retrieve hardware-target-specific parameters. ######################################################################## + interface = params.pop("interface", None) + # Set Bitstream (for FPGA targets). bitstream = params.pop("bitstream", None) rom_kind = params.pop("rom_kind", None) @@ -521,6 +535,8 @@ # so that they'll be parsed as global options rather than # command-specific options. target_args = select({ + # TODO(cfrantz): we may need to do something different here when + # the interface is "hyper310". "@//ci:lowrisc_fpga_cw310": ["--cw310-uarts=/dev/ttyACM_CW310_1,/dev/ttyACM_CW310_0"], "//conditions:default": [], }) + target_args
diff --git a/sw/device/tests/BUILD b/sw/device/tests/BUILD index 7824a1d..1e68ace 100644 --- a/sw/device/tests/BUILD +++ b/sw/device/tests/BUILD
@@ -1103,9 +1103,11 @@ name = "gpio_pinmux_test", srcs = ["gpio_pinmux_test.c"], cw310 = cw310_params( - interface = "hyperdebug", + interface = "hyper310", tags = ["manual"], test_cmds = [ + "--rom-kind=testrom", + "--bitstream=\"$(location {bitstream})\"", "--bootstrap=\"$(location {flash})\"", ], ),
diff --git a/sw/host/opentitanlib/src/backend/mod.rs b/sw/host/opentitanlib/src/backend/mod.rs index 2bf1811..f1a5ddc 100644 --- a/sw/host/opentitanlib/src/backend/mod.rs +++ b/sw/host/opentitanlib/src/backend/mod.rs
@@ -75,7 +75,7 @@ ultradebug::create(args)?, Some(Path::new("/__builtin__/opentitan_ultradebug.json")), ), - "hyperdebug" => ( + "hyper310" => ( hyperdebug::create::<CW310Flavor>(args)?, Some(Path::new("/__builtin__/hyperdebug_cw310.json")), ),
diff --git a/sw/host/tests/chip/gpio/src/main.rs b/sw/host/tests/chip/gpio/src/main.rs index 6b0a6c7..c29268a 100644 --- a/sw/host/tests/chip/gpio/src/main.rs +++ b/sw/host/tests/chip/gpio/src/main.rs
@@ -75,7 +75,7 @@ PinmuxMioOut::Ior13 => PinmuxOutsel::GpioGpio13, }, }, - "hyperdebug" => Config { + "hyper310" => Config { input: collection! { // The commented lines represent multi-fuction pins. These will // be added back in when the hyperdebug firmware can set these