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// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
// Register Package auto-generated by `reggen` containing data structure
package gpio_reg_pkg;
// Register to internal design logic
typedef struct packed {
struct packed {
logic [31:0] q; // [458:427]
} intr_state;
struct packed {
logic [31:0] q; // [426:395]
} intr_enable;
struct packed {
logic [31:0] q; // [394:363]
logic qe; // [362]
} intr_test;
struct packed {
logic [31:0] q; // [361:330]
logic qe; // [329]
} direct_out;
struct packed {
struct packed {
logic [15:0] q; // [328:313]
logic qe; // [312]
} data;
struct packed {
logic [15:0] q; // [311:296]
logic qe; // [295]
} mask;
} masked_out_lower;
struct packed {
struct packed {
logic [15:0] q; // [294:279]
logic qe; // [278]
} data;
struct packed {
logic [15:0] q; // [277:262]
logic qe; // [261]
} mask;
} masked_out_upper;
struct packed {
logic [31:0] q; // [260:229]
logic qe; // [228]
} direct_oe;
struct packed {
struct packed {
logic [15:0] q; // [227:212]
logic qe; // [211]
} data;
struct packed {
logic [15:0] q; // [210:195]
logic qe; // [194]
} mask;
} masked_oe_lower;
struct packed {
struct packed {
logic [15:0] q; // [193:178]
logic qe; // [177]
} data;
struct packed {
logic [15:0] q; // [176:161]
logic qe; // [160]
} mask;
} masked_oe_upper;
struct packed {
logic [31:0] q; // [159:128]
} intr_ctrl_en_rising;
struct packed {
logic [31:0] q; // [127:96]
} intr_ctrl_en_falling;
struct packed {
logic [31:0] q; // [95:64]
} intr_ctrl_en_lvlhigh;
struct packed {
logic [31:0] q; // [63:32]
} intr_ctrl_en_lvllow;
struct packed {
logic [31:0] q; // [31:0]
} ctrl_en_input_filter;
} gpio_reg2hw_t;
// Internal design logic to register
typedef struct packed {
struct packed {
logic [31:0] d; // [257:226]
logic de; // [225]
} intr_state;
struct packed {
logic [31:0] d; // [224:193]
logic de; // [192]
} data_in;
struct packed {
logic [31:0] d; // [191:160]
} direct_out;
struct packed {
struct packed {
logic [15:0] d; // [159:144]
} data;
struct packed {
logic [15:0] d; // [143:128]
} mask;
} masked_out_lower;
struct packed {
struct packed {
logic [15:0] d; // [127:112]
} data;
struct packed {
logic [15:0] d; // [111:96]
} mask;
} masked_out_upper;
struct packed {
logic [31:0] d; // [95:64]
} direct_oe;
struct packed {
struct packed {
logic [15:0] d; // [63:48]
} data;
struct packed {
logic [15:0] d; // [47:32]
} mask;
} masked_oe_lower;
struct packed {
struct packed {
logic [15:0] d; // [31:16]
} data;
struct packed {
logic [15:0] d; // [15:0]
} mask;
} masked_oe_upper;
} gpio_hw2reg_t;
// Register Address
parameter GPIO_INTR_STATE_OFFSET = 6'h 0;
parameter GPIO_INTR_ENABLE_OFFSET = 6'h 4;
parameter GPIO_INTR_TEST_OFFSET = 6'h 8;
parameter GPIO_DATA_IN_OFFSET = 6'h c;
parameter GPIO_DIRECT_OUT_OFFSET = 6'h 10;
parameter GPIO_MASKED_OUT_LOWER_OFFSET = 6'h 14;
parameter GPIO_MASKED_OUT_UPPER_OFFSET = 6'h 18;
parameter GPIO_DIRECT_OE_OFFSET = 6'h 1c;
parameter GPIO_MASKED_OE_LOWER_OFFSET = 6'h 20;
parameter GPIO_MASKED_OE_UPPER_OFFSET = 6'h 24;
parameter GPIO_INTR_CTRL_EN_RISING_OFFSET = 6'h 28;
parameter GPIO_INTR_CTRL_EN_FALLING_OFFSET = 6'h 2c;
parameter GPIO_INTR_CTRL_EN_LVLHIGH_OFFSET = 6'h 30;
parameter GPIO_INTR_CTRL_EN_LVLLOW_OFFSET = 6'h 34;
parameter GPIO_CTRL_EN_INPUT_FILTER_OFFSET = 6'h 38;
endpackage