| commit | 116ae53999f9a2519133cdc8cac7820279a3c989 | [log] [tgz] |
|---|---|---|
| author | Pirmin Vogel <vogelpi@lowrisc.org> | Mon Aug 30 10:23:37 2021 +0200 |
| committer | Pirmin Vogel <vogelpi@lowrisc.org> | Wed Sep 01 09:27:59 2021 +0200 |
| tree | cd4baa2f267dbe62d5eda1325d31f2396d18e098 | |
| parent | 7e60eca10f23f5a4fcdc3723fc571599f8e00178 [diff] |
[clkmgr] Use local BUFHCE clock gates on FPGA With this commit, clkmgr now uses local BUFHCE resources to clock gate the software hintable clocks (AES, HMAC, KMAC, OTBN). Previously, we were only using global BUFGCE resources. But these are scarce and under some circumstances, cannot be cascaded. As a result, we weren't gating software controllable and hintable clocks at all on FPGA. But since the hintable clocks don't span across many FPGA clock regions, they are well suited to be gated via local BUFHCE instead of global BUFGCE resources. The software controllable clocks clk_io_peri, clk_io_div2_peri, clk_io_div4_peri and clk_usb_peri are distributed across a bigger part of the design. This commit thus inserts a global BUFGCE clock gate for these. Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>
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