tree cd4baa2f267dbe62d5eda1325d31f2396d18e098
parent 7e60eca10f23f5a4fcdc3723fc571599f8e00178
author Pirmin Vogel <vogelpi@lowrisc.org> 1630311817 +0200
committer Pirmin Vogel <vogelpi@lowrisc.org> 1630481279 +0200

[clkmgr] Use local BUFHCE clock gates on FPGA

With this commit, clkmgr now uses local BUFHCE resources to clock gate
the software hintable clocks (AES, HMAC, KMAC, OTBN).

Previously, we were only using global BUFGCE resources. But these are
scarce and under some circumstances, cannot be cascaded. As a result,
we weren't gating software controllable and hintable clocks at all on
FPGA. But since the hintable clocks don't span across many FPGA clock
regions, they are well suited to be gated via local BUFHCE instead of
global BUFGCE resources.

The software controllable clocks clk_io_peri, clk_io_div2_peri,
clk_io_div4_peri and clk_usb_peri are distributed across a bigger part
of the design. This commit thus inserts a global BUFGCE clock gate for
these.

Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>