commit c62ec016b17f1d1d035a38e15432061e71331984
author Alex Van Damme <atv@google.com> Fri Apr 05 11:16:38 2024 -0700
committer Alex Van Damme <atv@google.com> Fri Apr 12 17:24:54 2024 +0000
tree b76ff2f3c70072f81274cf7afbec737444aae9d1
parent c47ddc834fa22c5a9381d36cc5cabe7f44c244b0

Add wall-time measurement to Benchmark

Change-Id: I26a2d5203284e132e3382103bcf0dcb114e0f7f1

benchmarks/benchmark_smc.c

diff --git a/benchmarks/benchmark_smc.c b/benchmarks/benchmark_smc.c
index f6de59f..2915dca 100644
--- a/benchmarks/benchmark_smc.c
+++ b/benchmarks/benchmark_smc.c
@@ -22,6 +22,7 @@
 #include "sw/device/lib/base/math.h"
 #include "sw/device/lib/dif/dif_ml_top.h"
 #include "sw/device/lib/dif/dif_rv_plic.h"
+#include "sw/device/lib/dif/dif_rv_timer.h"
 #include "sw/device/lib/runtime/hart.h"
 #include "sw/device/lib/runtime/irq.h"
 #include "sw/device/lib/runtime/log.h"
@@ -37,6 +38,7 @@
 OTTF_DEFINE_TEST_CONFIG();
 
 static dif_rv_plic_t plic_smc;
+static dif_rv_timer_t rv_timer;
 static dif_uart_t smc_uart;
 static dif_ml_top_t ml_top;
 
@@ -87,6 +89,9 @@
       mmio_region_from_addr(TOP_MATCHA_RV_PLIC_SMC_BASE_ADDR), &plic_smc));
   CHECK_DIF_OK(dif_ml_top_init(
       mmio_region_from_addr(TOP_MATCHA_ML_TOP_CORE_BASE_ADDR), &ml_top));
+  CHECK_DIF_OK(dif_rv_timer_init(
+      mmio_region_from_addr(TOP_MATCHA_RV_TIMER_SMC_BASE_ADDR), &rv_timer));
+
   CHECK_DIF_OK(dif_ml_top_irq_set_enabled(&ml_top, kDifMlTopIrqFinish,
                                           kDifToggleEnabled));
   CHECK_DIF_OK(dif_rv_plic_irq_set_priority(
@@ -94,6 +99,16 @@
   CHECK_DIF_OK(dif_rv_plic_irq_set_enabled(
       &plic_smc, kTopMatchaPlicIrqIdMlTopFinish, kTopMatchaPlicTargetIbex0Smc,
       kDifToggleEnabled));
+
+  dif_rv_timer_tick_params_t tick_params;
+  CHECK_DIF_OK(dif_rv_timer_approximate_tick_params(kClockFreqPeripheralHz,
+                                                    1000000, &tick_params));
+  CHECK_DIF_OK(dif_rv_timer_init(
+      mmio_region_from_addr(TOP_MATCHA_RV_TIMER_SMC_BASE_ADDR), &rv_timer));
+  CHECK_DIF_OK(dif_rv_timer_set_tick_params(&rv_timer, 0, tick_params));
+  CHECK_DIF_OK(
+      dif_rv_timer_counter_set_enabled(&rv_timer, 0, kDifToggleEnabled));
+
   irq_global_ctrl(true);
   irq_external_ctrl(true);
 
@@ -101,12 +116,16 @@
 
   // start kelvin
   ml_top_finish_done = false;
+  uint64_t timer_start;
+  CHECK_DIF_OK(dif_rv_timer_counter_read(&rv_timer, 0, &timer_start));
   CHECK_DIF_OK(dif_ml_top_release_ctrl_en(&ml_top));
 
   // wfi
   while (!ml_top_finish_done) {
     wait_for_interrupt();
   }
+  uint64_t timer_finish;
+  CHECK_DIF_OK(dif_rv_timer_counter_read(&rv_timer, 0, &timer_finish));
 
   BenchmarkOutputHeader* output_header_ptr =
       (BenchmarkOutputHeader*)((TOP_MATCHA_ML_TOP_DMEM_BASE_ADDR +
@@ -119,9 +138,13 @@
   uint32_t iterations = output_header_ptr->iterations;
   uint64_t cycles = output_header_ptr->cycles;
   uint64_t average_cycles = udiv64_slow(cycles, iterations, NULL);
+  uint64_t wall_time_us = timer_finish - timer_start;
+  uint64_t average_wall_time_us = udiv64_slow(wall_time_us, iterations, NULL);
   LOG_INFO("Iterations: %d", iterations);
   _print64("Total Cycles", cycles);
   _print64("Average Cycles per Iteration", average_cycles);
+  _print64("Wall time (us)", wall_time_us);
+  _print64("Wall time per Iteration (us)", average_wall_time_us);
   LOG_INFO("========== End Benchmark ==========");
   while (true) {
     wait_for_interrupt();

benchmarks/benchmarks.bzl

diff --git a/benchmarks/benchmarks.bzl b/benchmarks/benchmarks.bzl
index e28ed6a..f02e544 100644
--- a/benchmarks/benchmarks.bzl
+++ b/benchmarks/benchmarks.bzl
@@ -170,6 +170,7 @@
                 "@kelvin_sw//benchmarks:benchmark_header",
                 "@kelvin_sw//benchmarks:cycle_count",
                 "@lowrisc_opentitan//sw/device/lib/dif:rv_plic",
+                "@lowrisc_opentitan//sw/device/lib/dif:rv_timer",
             ],
         )