| // Copyright 2022 Google LLC |
| // |
| // Licensed under the Apache License, Version 2.0 (the "License"); |
| // you may not use this file except in compliance with the License. |
| // You may obtain a copy of the License at |
| // |
| // http://www.apache.org/licenses/LICENSE-2.0 |
| // |
| // Unless required by applicable law or agreed to in writing, software |
| // distributed under the License is distributed on an "AS IS" BASIS, |
| // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| // See the License for the specific language governing permissions and |
| // limitations under the License. |
| |
| // *************************************************** |
| // Kelvin single test core |
| // *************************************************** |
| |
| // TODO(jonathantate): Move the cpu and dmem blocks back into ml_core.repl and |
| // uncomment this 'using ".../ml_core.repl"' line. |
| // using "sim/config/platforms/ml_core.repl" |
| |
| cpu2: CPU.KelvinRiscV32 @ sysbus |
| hartId: 2 |
| |
| //RAM_VEC_MEM [‘h5A00_0000 - ‘h5A3F_FFFF) 4MB RAM for Vector core |
| ram_vec_dmem: Memory.MappedMemory @ sysbus 0x5A000000 |
| size: 0x00400000 |
| |
| vec_controlblock : CPU.KelvinRiscV32_ControlBlock @ sysbus 0x5C000000 |
| core: cpu2 |
| tcmSize: 0x00400000 |
| tcmRangeStart: 0x5A000000 |
