| commit | ee7e4bc5c70dd47841c32f404118266fb8a28c10 | [log] [tgz] |
|---|---|---|
| author | Sam Leffler <sleffler@google.com> | Fri Apr 26 16:29:46 2024 -0700 |
| committer | Sam Leffler <sleffler@google.com> | Fri Apr 26 16:39:31 2024 -0700 |
| tree | 2b771f03905471235b69f1ac1cae76f33dd60d91 | |
| parent | 41351113dc0c41a06a6177f9e311a35ed3b677d4 [diff] |
Revert "i2s: Add functionality for a loopback sanity test" This reverts commit 822f23f438199b9a67fb5b92c9cd94cd7306c28a. Writes to the Control register that zero the SLPBK bit stop any tx+rx threads as a side-effect. Since this happens as a side effect of writing the Control register TX or RX bits tx and rx no longer work. Change-Id: I570023934d746591f1bb30a77027223a64416994
This project hosts the Renode simulation description, platform definition, and simulation models for customized components.