)]}'
{
  "commit": "ee7e4bc5c70dd47841c32f404118266fb8a28c10",
  "tree": "2b771f03905471235b69f1ac1cae76f33dd60d91",
  "parents": [
    "41351113dc0c41a06a6177f9e311a35ed3b677d4"
  ],
  "author": {
    "name": "Sam Leffler",
    "email": "sleffler@google.com",
    "time": "Fri Apr 26 16:29:46 2024 -0700"
  },
  "committer": {
    "name": "Sam Leffler",
    "email": "sleffler@google.com",
    "time": "Fri Apr 26 16:39:31 2024 -0700"
  },
  "message": "Revert \"i2s: Add functionality for a loopback sanity test\"\n\nThis reverts commit 822f23f438199b9a67fb5b92c9cd94cd7306c28a.\n\nWrites to the Control register that zero the SLPBK bit stop any tx+rx\nthreads as a side-effect. Since this happens as a side effect of writing\nthe Control register TX or RX bits tx and rx no longer work.\n\nChange-Id: I570023934d746591f1bb30a77027223a64416994\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "918ca12cf16563abd87b7fac654596b3bb5c8e68",
      "old_mode": 33188,
      "old_path": "shodan_infrastructure/MatchaI2S.cs",
      "new_id": "33cf1907a51371f0c3b2360c98f90496d6b59bc0",
      "new_mode": 33188,
      "new_path": "shodan_infrastructure/MatchaI2S.cs"
    }
  ]
}