shodan_infrastructure/SmcRiscV32.cs

//
// Copyright (c) 2023 Google LLC
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

using Antmicro.Renode.Core;
using Antmicro.Renode.Logging;
using Antmicro.Renode.Peripherals.Bus;

namespace Antmicro.Renode.Peripherals.CPU
{
  public class SmcRiscV32_ControlBlock : IDoubleWordPeripheral, IKnownSize
  {
    public SmcRiscV32_ControlBlock(RiscV32 cpu)
    {
      this.cpu = cpu;
    }

    public void Reset() // IPeripheral
    {
    }

    public uint ReadDoubleWord(long offset) // IDoubleWordPeripheral
    {
      return cpu.PC;
    }

    public void WriteDoubleWord(long offset, uint value) // IDoubleWordPeripheral
    {
      if (value == 0) {
        this.Log(LogLevel.Noisy, "Stopping SMC");
        cpu.PC = 0;
        cpu.IsHalted = true;
      }
      else {
        this.Log(LogLevel.Noisy, "Starting SMC at 0x{0:X8}", value);
        cpu.PC = value;
        cpu.IsHalted = false;
      }
    }

    public long Size => 0x4;
    private RiscV32 cpu;
  }
}