blob: 49225c35f61d0804f521360b815921fedab46384 [file] [log] [blame]
using "sim/config/platforms/smc.repl"
using "sim/config/platforms/secure.repl"
using "sim/config/platforms/springbok_ml_core.repl"
// To model the TLUL mailbox spec, we need a Renode peripheral that listens
// to address ranges for both endpoints of the mailbox. This is the current
// best way to do that, per Renode dev's recommendations.
mailbox : Mailbox @ {
sysbus new Bus.BusMultiRegistration {
address: 0x40800000; // TOP_MATCHA_MAILBOX_SEC_BASE_ADDR
size: 0x28;
region: "endpoint_a"
};
sysbus new Bus.BusMultiRegistration {
address: 0x540F1000; // TOP_MATCHA_MAILBOX_SMC_BASE_ADDR
size: 0x28;
region: "endpoint_b"
}
}
endpoint_a_name: "SEC"
endpoint_b_name: "SMC"
wtirq_A -> plic@187 // kTopMatchaPlicIrqIdMailboxSecWtirq
rtirq_A -> plic@188 // kTopMatchaPlicIrqIdMailboxSecRtirq
eirq_A -> plic@189 // kTopMatchaPlicIrqIdMailboxSecEirq
wtirq_B -> smc_plic@10 // kTopMatchaPlicIrqIdMailboxSmcWtirq
rtirq_B -> smc_plic@11 // kTopMatchaPlicIrqIdMailboxSmcRtirq
eirq_B -> smc_plic@12 // kTopMatchaPlicIrqIdMailboxSmcEirq
cpio_mem: Memory.MappedMemory @ sysbus 0x46000000
size: 0x01000000
vec_controlblock : CPU.SpringbokRiscV32_ControlBlock @ sysbus 0x47000000
core: cpu2
mmuNumWindows: 6 // See: go/shodan-vc-memory
mmuVirtualWindowSize: 0x1000000
mmuMemorySize: 0x1000000
mmuRangeStart: 0x80000000
HostReqIRQ -> smc_plic@13 // kTopMatchaPlicIrqIdVcTopHostReq @ top_matcha.h
FinishIRQ -> smc_plic@14 // kTopMatchaPlicIrqIdVcTopFinish @ top_matcha.h
InstructionFaultIRQ -> smc_plic@15 // kTopMatchaPlicIrqIdVcTopInstructionFault @ top_matcha.h
DataFaultIRQ -> smc_plic@16 // kTopMatchaPlicIrqIdVcTopDataFault @ top_matcha.h
// ISP [‘h4200_0000 - ‘h4200_FFFF) 64KB ISP registers
// DMA Ctrl [‘h4201_0000 - ‘h4201_FFFF) 64KB DMA control interface
// DSP Ctrl [‘h4202_0000 - ‘h4202_FFFF) 64KB Audio DSP control interface
// TOP_MATCHA_I2S0_BASE_ADDR @ top_matcha.h
// I2S0 ['h5410_0000 - 'h5410_0040) 64B registers
i2s0 : Sound.MatchaI2S @ sysbus 0x54100000
TxWatermarkIRQ -> smc_plic@39 // kTopMatchaPlicIrqIdI2s0TxWatermark @ top_matcha.h
RxWatermarkIRQ -> smc_plic@40 // kTopMatchaPlicIrqIdI2s0RxWatermark @ top_matcha.h
TxEmptyIRQ -> smc_plic@41 // kTopMatchaPlicIrqIdI2s0TxEmpty @ top_matcha.h
RxOverflowIRQ -> smc_plic@42 // kTopMatchaPlicIrqIdI2s0RxOverflow @ top_matcha.h