Merge "sim/config: Merge ITCM and DTCM into TCM."

opentitan-earlgrey-gen.repl

diff --git a/opentitan-earlgrey-gen.repl b/opentitan-earlgrey-gen.repl
index 26cc637..d5cfc75 100644
--- a/opentitan-earlgrey-gen.repl
+++ b/opentitan-earlgrey-gen.repl
@@ -162,6 +162,22 @@
         MarkAsSkippedOnSystemReset sysbus.pwrmgr_aon
         MarkAsSkippedOnSystemReset sysbus.flash_ctrl
 
+// One Time Programmable Memory Controller
+otp_ctrl: Miscellaneous.OpenTitan_OneTimeProgrammableMemoryController @ sysbus 0x40130000
+    AValuesChain: "8638C62621EC19E8966416165252225F03B9C97821B7B107381030AB3D20AB124694BF85E417495A"
+    BValuesChain: "E679DF6E77EDDBECDE74B677DFF23AFFC3BFFB79B5FFFD87F930B4FB3F6BFF9A5F97BFD7FCBFE9FF"
+    CValuesChain: "0C1B73141BA20D421FD124302E8F443DE02C272E2CEEC1138DAD07CBD24A18F583A34D51A42A1E702A7E90F05A81D12E"
+    DValuesChain: "3E1FFB763FE3CDD61FF97735BEBF5CFDE5BDB7AFAEFEE19B9FBD9FCFD2EF3CF7CFEFFD53A7EE7FF36BFE92FDFA95F9AE"
+
+// Life Cycle Controller
+lc_ctrl: Miscellaneous.OpenTitan_LifeCycleController @ sysbus 0x40140000
+    resetManager: rstmgr_aon
+    otpController: otp_ctrl
+    DeviceId: "BF5EA92044DAC540CFD1A00105568DFA97D9C35EA0407D71320B5E0434DB637F"
+    TestExitToken: "000102030405060708090A0B0C0D0E0F"
+    TestUnlockToken: "79DEF38F41A9B895F6BDF341BEADA9B6"
+    RMAToken: "4D89B62D287CB957C2500042306DFD57"
+
 // Tag memory for debugging
 sysbus:
     init:

shodan.resc

diff --git a/shodan.resc b/shodan.resc
index 261d801..3f2c26d 100644
--- a/shodan.resc
+++ b/shodan.resc
@@ -36,8 +36,8 @@
 uart0-analyzer TimestampFormat None
 uart5-analyzer TimestampFormat None
 
-# Load the bootrom into the 16k rom at 0x8000
-sysbus LoadELF @out/shodan_boot_rom/build-out/multihart_boot_rom/multihart_boot_rom_sim_verilator.elf
+# Load the bootrom into the 16k rom at 0x8000 (useVirtualAddress = false, allowLoadsOnlyToMemory = true)
+sysbus LoadELF @out/shodan_boot_rom/multihart_boot_rom/multihart_boot_rom.elf false true cpu0
 
 # Load the tarball of CAmkES components, cpio bundle of built-in files, and the seL4 kernel
 $tar ?= @out/ext_flash_release.tar
@@ -47,9 +47,8 @@
 sysbus LoadBinary $cpio 0x46000000
 sysbus LoadSymbolsFrom $kernel
 
-# Start both cores at the bootrom entry point.
+# Start cpu0 at the bootrom entry point.
 sysbus.cpu0 PC 0x8090
-sysbus.cpu1 PC 0x8090
 
 # Start the vector core at address 0 of its instruction TCM.
 sysbus.cpu2 PC 0x30000000