config: Add hps sim config.

This CL:
* Adds an HPS resc file that only loads the matcha + finch + ml tarball
* Adds an HPS repl file that adds the HM01B0 camera to the Shodan config
* Updates the number of PLIC interrupts to match the latest top_matcha
* Adds a temporary flash to the SMC

The temporary flash is necessary as the Tock kernel expects to relocate
the app from flash to sram. While I was able to remove the need for the
kernel itself to relocate from flash, I'm having trouble with the app.
It likely needs more kernel work to complete.

Change-Id: I13aba99f79e4f7390f82fb4c7f58a62d6f137246
diff --git a/hps.resc b/hps.resc
new file mode 100644
index 0000000..4eca830
--- /dev/null
+++ b/hps.resc
@@ -0,0 +1,64 @@
+:name: HPS
+:description: This script runs the HPS Demo
+
+$name?="matcha"
+
+using sysbus
+mach create $name
+EnsureTypeIsLoaded "Antmicro.Renode.Peripherals.CPU.RiscV32"
+include @sim/config/shodan_infrastructure/SpringbokRiscV32.cs
+EnsureTypeIsLoaded "Antmicro.Renode.Peripherals.CPU.SpringbokRiscV32"
+EnsureTypeIsLoaded "Antmicro.Renode.Peripherals.CPU.SpringbokRiscV32_ControlBlock"
+include @sim/config/shodan_infrastructure/SmcRiscV32.cs
+include @sim/config/shodan_infrastructure/OpenTitan2_UART.cs
+include @sim/config/shodan_infrastructure/Mailbox.cs
+include @sim/config/shodan_infrastructure/AddressRangeStub.cs
+
+machine LoadPlatformDescription @sim/config/platforms/hps.repl
+
+$term_port?=3456
+emulation CreateServerSocketTerminal $term_port "term" false
+connector Connect uart5 term
+# for a client, bash users may consider this inline script:
+#
+# stty sane -echo -icanon; socat TCP:localhost:$term_port -; stty sane
+#
+# tmux users may consider adding a binding to ~/.tmux.conf
+#
+# bind-key k split-window "stty -echo -icanon; socat TCP:localhost:$term_port -"
+
+# Hook up the analyzers to the uarts so we can see their output in the main
+# Renode log
+showAnalyzer "uart0-analyzer" sysbus.uart0 Antmicro.Renode.Analyzers.LoggingUartAnalyzer
+showAnalyzer "uart5-analyzer" sysbus.uart5 Antmicro.Renode.Analyzers.LoggingUartAnalyzer
+
+# Set the uarts host/virt timestamp format. Options: None, Virtual, Host, Full.
+uart0-analyzer TimestampFormat None
+uart5-analyzer TimestampFormat None
+
+# Load the bootrom into the 32k rom at 0x8000 (useVirtualAddress = false, allowLoadsOnlyToMemory = true)
+sysbus LoadELF @out/shodan_boot_rom/multihart_boot_rom/multihart_boot_rom.elf false true cpu0
+
+# Load the tarball of Tock on SEC, Tock on SMC, and HPS model.
+$tar ?= @out/hps_ext_flash_release.tar
+sysbus LoadBinary $tar 0x44000000
+
+# Start cpu0 at the bootrom entry point.
+sysbus.cpu0 PC 0x8090
+
+# Start the vector core at address 0 of its instruction TCM.
+sysbus.cpu2 PC 0x34000000
+# Set the vector core to be less interactive to IO for faster execution
+$vector_core_mips ?= 1000
+sysbus.cpu2 PerformanceInMips $vector_core_mips
+
+# Start GDB and halt both cores so we can connect GDB before the bootrom has
+# started.
+$gdb_port?=3333
+machine StartGdbServer $gdb_port false cpu0
+machine StartGdbServer $gdb_port false cpu1
+machine StartGdbServer $gdb_port false cpu2
+
+cpu0 IsHalted true
+cpu1 IsHalted true
+cpu2 IsHalted true
diff --git a/platforms/hps.repl b/platforms/hps.repl
new file mode 100644
index 0000000..6e7c4a9
--- /dev/null
+++ b/platforms/hps.repl
@@ -0,0 +1,10 @@
+using "sim/config/platforms/shodan.repl"
+
+camera: Sensors.HiMaxHM01B0 @ cam_i2c 0x24
+
+// TODO(jesionowski): Temporary piece of flash for the finch app. Tock kernel
+// assumes that the app needs to be relocated from flash. This must be removed
+// once that is fixed in the kernel.
+// eFLASH            [‘h2000_0000 - ‘h20FF_FFFF)  1M
+eflash_smc: Memory.MappedMemory @ sysbus 0x21000000
+    size: 0x00100000
diff --git a/platforms/smc.repl b/platforms/smc.repl
index 8ee98ed..10a03f2 100644
--- a/platforms/smc.repl
+++ b/platforms/smc.repl
@@ -44,7 +44,7 @@
     0 -> cpu1@11
     1 -> cpu1@9
     // Must be >= kTopMatchaPlicIrqIdLastSmc in top_matcha.h
-    numberOfSources: 32
+    numberOfSources: 34
     numberOfContexts: 2  // MEIP and SEIP
 
 uart5: UART.OpenTitan_UART @ sysbus 0x50000000
diff --git a/shodan.resc b/shodan.resc
index d42e8b1..d2bfb53 100644
--- a/shodan.resc
+++ b/shodan.resc
@@ -37,7 +37,7 @@
 uart0-analyzer TimestampFormat None
 uart5-analyzer TimestampFormat None
 
-# Load the bootrom into the 16k rom at 0x8000 (useVirtualAddress = false, allowLoadsOnlyToMemory = true)
+# Load the bootrom into the 32k rom at 0x8000 (useVirtualAddress = false, allowLoadsOnlyToMemory = true)
 sysbus LoadELF @out/shodan_boot_rom/multihart_boot_rom/multihart_boot_rom.elf false true cpu0
 
 # Load the tarball of CAmkES components, cpio bundle of built-in files, and the seL4 kernel