Update rstmgr setting in secure core

Match https://github.com/renode/renode/commit/31b82ded4

Change-Id: I2ac2171037a1f462b136b0c837fa55df80f737b6

platforms/secure.repl

diff --git a/platforms/secure.repl b/platforms/secure.repl
index efbb488..8c64c69 100644
--- a/platforms/secure.repl
+++ b/platforms/secure.repl
@@ -153,6 +153,7 @@
 
 // PWRMGR_AON        [‘h4040_0000 - ‘h4040_0FFF)   4KB Power Manger Control
 pwrmgr_aon: Miscellaneous.OpenTitan_PowerManager@ sysbus 0x40400000
+    resetManager: rstmgr_aon
     FatalAlert -> alert_handler@22
 
 // RSTMGR_AON        [‘h4041_0000 - ‘h4041_0FFF)   4KB Reset Manger Control
@@ -166,6 +167,10 @@
         MarkAsSkippedOnSystemReset sysbus.rstmgr_aon
         MarkAsSkippedOnSystemReset sysbus.pwrmgr_aon
         MarkAsSkippedOnSystemReset sysbus.flash_ctrl
+        MarkAsSkippedOnLowPowerExitReset sysbus.rstmgr_aon
+        MarkAsSkippedOnLowPowerExitReset sysbus.pwrmgr_aon
+        MarkAsSkippedOnLowPowerExitReset sysbus.timer_aon
+        MarkAsSkippedOnLowPowerExitReset sysbus.ram_ret_aon
 
 // CLKMGR_AON        [‘h4042_0000 - ‘h4042_0FFF)   4KB Clock Manger Control
 clock_manager: Miscellaneous.OpenTitan_ClockManager @ sysbus 0x40420000