blob: eaf6580c880636c074674666b2df582b1a921f80 [file]
:name: OpenTitan
:description: This script runs Tock & seL4 on OpenTitan matcha
$name?="matcha"
using sysbus
mach create $name
EnsureTypeIsLoaded "Antmicro.Renode.Peripherals.CPU.RiscV32"
include @sim/config/shodan_infrastructure/SpringbokRiscV32_WindowMMU.cs
EnsureTypeIsLoaded "Antmicro.Renode.Peripherals.CPU.SpringbokRiscV32_WindowMMU"
include @sim/config/shodan_infrastructure/SpringbokRiscV32.cs
include @sim/config/shodan_infrastructure/SmcRiscV32.cs
include @sim/config/shodan_infrastructure/OpenTitan2_UART.cs
include @sim/config/shodan_infrastructure/Mailbox.cs
machine LoadPlatformDescription @sim/config/platforms/shodan.repl
sysbus Tag <0x40000000 0x1000> "OPENTITAN_EARLGREY_DEV_UART0"
sysbus Tag <0x40010000 0x1000> "OPENTITAN_EARLGREY_DEV_UART1"
sysbus Tag <0x40020000 0x1000> "OPENTITAN_EARLGREY_DEV_UART2"
sysbus Tag <0x40030000 0x1000> "OPENTITAN_EARLGREY_DEV_UART3"
sysbus Tag <0x40040000 0x1000> "OPENTITAN_EARLGREY_DEV_GPIO"
sysbus Tag <0x40050000 0x2000> "OPENTITAN_EARLGREY_DEV_SPI"
sysbus Tag <0x40060000 0x1000> "OPENTITAN_EARLGREY_DEV_SPI_HOST0"
sysbus Tag <0x40070000 0x1000> "OPENTITAN_EARLGREY_DEV_SPI_HOST1"
sysbus Tag <0x40080000 0x1000> "OPENTITAN_EARLGREY_DEV_I2C0"
sysbus Tag <0x40090000 0x1000> "OPENTITAN_EARLGREY_DEV_I2C1"
sysbus Tag <0x400A0000 0x1000> "OPENTITAN_EARLGREY_DEV_I2C2"
sysbus Tag <0x400E0000 0x1000> "OPENTITAN_EARLGREY_DEV_PATTGEN"
sysbus Tag <0x40100000 0x1000> "OPENTITAN_EARLGREY_DEV_RV_TIMER"
sysbus Tag <0x50010000 0x1000> "OPENTITAN_EARLGREY_DEV_RV_TIMER_SMC"
sysbus Tag <0x40110000 0x1000> "OPENTITAN_EARLGREY_DEV_USBDEV"
sysbus Tag <0x40130000 0x4000> "OPENTITAN_EARLGREY_DEV_OTP_CTRL"
sysbus Tag <0x40140000 0x1000> "OPENTITAN_EARLGREY_DEV_LC_CTRL"
sysbus Tag <0x40150000 0x1000> "OPENTITAN_EARLGREY_DEV_ALERT_HANDLER"
sysbus Tag <0x40400000 0x1000> "OPENTITAN_EARLGREY_DEV_PWRMGR_AON"
sysbus Tag <0x40410000 0x1000> "OPENTITAN_EARLGREY_DEV_RSTMGR"
sysbus Tag <0x40420000 0x1000> "OPENTITAN_EARLGREY_DEV_CLKMGR"
sysbus Tag <0x40440000 0x1000> "OPENTITAN_EARLGREY_DEV_ADC_CTRL_AON"
sysbus Tag <0x40460000 0x1000> "OPENTITAN_EARLGREY_DEV_PINMUX_AON"
sysbus Tag <0x40470000 0x1000> "OPENTITAN_EARLGREY_DEV_AON_TIMER_AON"
sysbus Tag <0x40480000 0x1000> "OPENTITAN_EARLGREY_DEV_AST"
sysbus Tag <0x40490000 0x1000> "OPENTITAN_EARLGREY_DEV_SENSOR_CTRL_AON"
sysbus Tag <0x40500000 0x1000> "OPENTITAN_EARLGREY_DEV_SRAM_CTRL_RET_AON"
sysbus Tag <0x41000000 0x1000> "OPENTITAN_EARLGREY_DEV_FLASH_CTRL"
sysbus Tag <0x48000000 0x8000000> "OPENTITAN_EARLGREY_DEV_RV_PLIC"
sysbus Tag <0x41100000 0x1000> "OPENTITAN_EARLGREY_DEV_AES"
sysbus Tag <0x41110000 0x1000> "OPENTITAN_EARLGREY_DEV_HMAC"
sysbus Tag <0x41120000 0x1000> "OPENTITAN_EARLGREY_DEV_KMAC"
sysbus Tag <0x41130000 0x1000> "OPENTITAN_EARLGREY_DEV_KEYMGR"
sysbus Tag <0x41150000 0x1000> "OPENTITAN_EARLGREY_DEV_CSRNG"
sysbus Tag <0x41160000 0x1000> "OPENTITAN_EARLGREY_DEV_ENTROPY"
sysbus Tag <0x41170000 0x1000> "OPENTITAN_EARLGREY_DEV_EDN0"
sysbus Tag <0x41180000 0x1000> "OPENTITAN_EARLGREY_DEV_EDN1"
sysbus Tag <0x411C0000 0x1000> "OPENTITAN_EARLGREY_DEV_SRAM_CTRL"
sysbus Tag <0x411D0000 0x1000> "OPENTITAN_EARLGREY_DEV_OTBN"
sysbus Tag <0x411E0000 0x1000> "OPENTITAN_EARLGREY_DEV_ROM_CTRL_REGS"
$term_port?="/tmp/term"
emulation CreateUartPtyTerminal "term" $term_port true
connector Connect uart5 term
# for a client, bash users may consider this inline script:
#
# stty sane -echo -icanon; socat - /tmp/term,raw; stty sane
#
# tmux users may consider adding a binding to ~/.tmux.conf
#
# bind-key k split-window "stty -echo -icanon; socat - /tmp/term,raw"
# Hook up the analyzers to the uarts so we can see their output in the main
# Renode log
showAnalyzer "uart0-analyzer" sysbus.uart0 Antmicro.Renode.Analyzers.LoggingUartAnalyzer
showAnalyzer "uart5-analyzer" sysbus.uart5 Antmicro.Renode.Analyzers.LoggingUartAnalyzer
# Set the uarts host/virt timestamp format. Options: None, Virtual, Host, Full.
uart0-analyzer TimestampFormat None
uart5-analyzer TimestampFormat None
# Load the bootrom into the 16k rom at 0x8000
sysbus LoadELF @out/shodan_boot_rom/build-out/multihart_boot_rom/multihart_boot_rom_sim_verilator.elf
# Load the system software tar and model ELF into external flash
$tar ?= @out/ext_flash_release.tar
sysbus LoadBinary $tar 0x44000000
sysbus LoadBinary @out/springbok_iree/samples/quant_model/person_detection_embedded_sync 0x46000000
# Start both cores at the bootrom entry point.
sysbus.cpu0 PC 0x8090
sysbus.cpu1 PC 0x8090
# Start the vector core at address 0 of its instruction TCM.
sysbus.cpu2 PC 0x30000000
# Start GDB and halt both cores so we can connect GDB before the bootrom has
# started.
$gdb_port?=3333
machine StartGdbServer $gdb_port false cpu0
machine StartGdbServer $gdb_port false cpu1
cpu0 IsHalted true
cpu1 IsHalted true
cpu2 IsHalted true