Update plic sim config

- Due to some changes on the hardware side, a few interrupt vectors
  changed their value, and more sources exist. Update the sim config to
  reflect this.

Bug: 258850990
Change-Id: If2da21c78387d22c2ab0ffc21906aa43dd4ca5ad

platforms/secure.repl

diff --git a/platforms/secure.repl b/platforms/secure.repl
index 2cbb2fe..b2e0da0 100644
--- a/platforms/secure.repl
+++ b/platforms/secure.repl
@@ -138,7 +138,7 @@
     // Numbers on the right reference bits in the target MIP.
     // Bit 11 corresponds MEIP and bit 9 to SEIP.
     0 -> cpu0@11
-    numberOfSources: 186
+    numberOfSources: 193
     numberOfContexts: 1
 
 // AES               [‘h4110_0000 - ‘h4110_0FFF)   4KB AES Control

platforms/shodan.repl

diff --git a/platforms/shodan.repl b/platforms/shodan.repl
index cae484b..0109c26 100644
--- a/platforms/shodan.repl
+++ b/platforms/shodan.repl
@@ -20,9 +20,9 @@
     }
     endpoint_a_name: "SEC"
     endpoint_b_name: "SMC"
-    wtirq_A -> plic@181    // kTopMatchaPlicIrqIdMailboxSecWtirq
-    rtirq_A -> plic@182    // kTopMatchaPlicIrqIdMailboxSecRtirq
-    eirq_A  -> plic@183    // kTopMatchaPlicIrqIdMailboxSecEirq
+    wtirq_A -> plic@190    // kTopMatchaPlicIrqIdMailboxSecWtirq
+    rtirq_A -> plic@191    // kTopMatchaPlicIrqIdMailboxSecRtirq
+    eirq_A  -> plic@192    // kTopMatchaPlicIrqIdMailboxSecEirq
     wtirq_B -> smc_plic@10 // kTopMatchaPlicIrqIdMailboxSmcWtirq
     rtirq_B -> smc_plic@11 // kTopMatchaPlicIrqIdMailboxSmcRtirq
     eirq_B  -> smc_plic@12 // kTopMatchaPlicIrqIdMailboxSmcEirq