Move verilator rule to a separate file

- Prevents downstream targest that load matcha.bzl from having to load
  fusesoc_build from fusesoc.bzl

Change-Id: I5e79a03ef6b2125249ef1c6586134f7174021234

hw/BUILD

diff --git a/hw/BUILD b/hw/BUILD
index a2c652e..85d820d 100644
--- a/hw/BUILD
+++ b/hw/BUILD
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: Apache-2.0
 
 load("@bazel_skylib//rules:common_settings.bzl", "string_list_flag")
-load("//rules:matcha.bzl", "target_fusesoc_build")
+load("//rules:verilator.bzl", "target_fusesoc_build")
 
 package(default_visibility = ["//visibility:public"])
 

rules/matcha.bzl

diff --git a/rules/matcha.bzl b/rules/matcha.bzl
index 5527117..bf4886a 100644
--- a/rules/matcha.bzl
+++ b/rules/matcha.bzl
@@ -5,10 +5,6 @@
 """Rules to build Matcha for the RiscV target"""
 
 load(
-    "@lowrisc_opentitan//rules:fusesoc.bzl",
-    "fusesoc_build",
-)
-load(
     "@lowrisc_opentitan//rules:opentitan.bzl",
     "bin_to_vmem",
     "opentitan_binary",
@@ -759,34 +755,3 @@
             vmem_name,
         ],
     )
-
-def target_fusesoc_build(name, output_groups):
-    """A helper macro for building verilator targets.
-
-    Args:
-      name: The name of the top level target.
-      output_groups: Verilator testbench passed to fusesoc_build.
-    """
-
-    fusesoc_build(
-        name = "{}_verilator_real".format(name),
-        srcs = [
-            ":all_files",
-            "//hw/top_{}:all_files".format(name),
-            "//hw/top_{}/dv/verilator:all_files".format(name),
-        ],
-        cores = [
-            "//:cores",
-            "//hw/ip:BUILD",
-            "//hw/top_{}:BUILD".format(name),
-        ],
-        data = ["@lowrisc_opentitan//hw/ip/otbn:all_files"],
-        make_options = ":make_options",
-        output_groups = output_groups,
-        systems = ["lowrisc:dv:{}_verilator_sim".format(name)],
-        tags = [
-            "manual",
-            "verilator",
-        ],
-        target = "sim",
-    )

rules/verilator.bzl

diff --git a/rules/verilator.bzl b/rules/verilator.bzl
new file mode 100644
index 0000000..f186b85
--- /dev/null
+++ b/rules/verilator.bzl
@@ -0,0 +1,41 @@
+# Copyright 2024 Google LLC.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+"""Support rules for building target specific verilated simulators"""
+
+load(
+    "@lowrisc_opentitan//rules:fusesoc.bzl",
+    "fusesoc_build",
+)
+
+def target_fusesoc_build(name, output_groups):
+    """A helper macro for building verilator targets.
+
+    Args:
+      name: The name of the top level target.
+      output_groups: Verilator testbench passed to fusesoc_build.
+    """
+
+    fusesoc_build(
+        name = "{}_verilator_real".format(name),
+        srcs = [
+            ":all_files",
+            "//hw/top_{}:all_files".format(name),
+            "//hw/top_{}/dv/verilator:all_files".format(name),
+        ],
+        cores = [
+            "//:cores",
+            "//hw/ip:BUILD",
+            "//hw/top_{}:BUILD".format(name),
+        ],
+        data = ["@lowrisc_opentitan//hw/ip/otbn:all_files"],
+        make_options = ":make_options",
+        output_groups = output_groups,
+        systems = ["lowrisc:dv:{}_verilator_sim".format(name)],
+        tags = [
+            "manual",
+            "verilator",
+        ],
+        target = "sim",
+    )