[HW][ML_TOP] Clean up register defintion.

1. Add "reserved" in description for those registers which HW
   implementation is TBD.

Change-Id: I618e5828b9f7844cd5c31706c14b246dde873273
diff --git a/hw/top_matcha/ip/ml_top/data/ml_top.hjson b/hw/top_matcha/ip/ml_top/data/ml_top.hjson
index 468a503..403a32d 100644
--- a/hw/top_matcha/ip/ml_top/data/ml_top.hjson
+++ b/hw/top_matcha/ip/ml_top/data/ml_top.hjson
@@ -109,7 +109,7 @@
           { bits: "0",
             name: "freeze",
             resval: 0x0
-            desc: "Writing a 1 will freeze the vector core clock"
+            desc: "Writing a 1 will freeze the vector core clock (reserved), clock gating is implemented at chip root level instead now."
           }
           { bits: "1",
             name: "ml_reset",
@@ -150,18 +150,18 @@
           { bits: "0",
             name: "d_mem_out_of_range",
             resval: 0x0
-            desc: "A value of 1 indicates an out of DMEM range access"
+            desc: "A value of 1 indicates an out of DMEM range access (reserved)"
           }
           { bits: "8:1",
             name: "d_mem_disable_access",
             resval: 0x0
-            desc: "A value of 1 indicates an access to a disabled DMEM bank"
+            desc: "A value of 1 indicates an access to a disabled DMEM bank (reserved)"
           }
         ]
       }
 
       { name: "INIT_START",
-        desc: "Memory Initialization Start Address",
+        desc: "Memory Initialization Start Address (reserved), HW implmentation TBD",
         swaccess: "rw",
         hwaccess: "hro",
         fields: [
@@ -174,7 +174,7 @@
       }
 
       { name: "INIT_END",
-        desc: "Memory Initialization End Address",
+        desc: "Memory Initialization End Address (reserved), HW implementation TBD",
         swaccess: "rw",
         hwaccess: "hrw",
         fields: [
@@ -192,7 +192,7 @@
       }
 
       { name: "INIT_STATUS",
-        desc: "Memory Initialization Status",
+        desc: "Memory Initialization Status (reserved), HW implementation TBD",
         swaccess: "rc",
         hwaccess: "hwo",
         fields: [