Add csr excl tags to fix chip_csr_bit_bash test (Bug: 295895946) Change-Id: I2e859143d4e0d3fef52c968645b17fa4829e688d
diff --git a/hw/top_matcha/ip/i2s/data/i2s.hjson b/hw/top_matcha/ip/i2s/data/i2s.hjson index db08151..c24f629 100644 --- a/hw/top_matcha/ip/i2s/data/i2s.hjson +++ b/hw/top_matcha/ip/i2s/data/i2s.hjson
@@ -90,7 +90,9 @@ desc: "RX FIFO is empty" resval: "1" } - ] + ], + tags: [// STATUS in read only + "excl:CsrAllTests:CsrExclWrite"] } { name: "RDATA", desc: "I2S read data", @@ -100,9 +102,9 @@ hwre: "true", fields: [ { bits: "31:0" } - ] - tags: [// read wdata when fifo is empty, dut may return unknown data - "excl:CsrAllTests:CsrExclCheck"] + ], + tags: [// RDATA in read only + "excl:CsrAllTests:CsrExclWrite"] } { name: "WDATA", desc: "I2S write data", @@ -113,7 +115,7 @@ { bits: "31:0" } ] tags: [// don't write to wdata - it affects several other csrs - "excl:CsrNonInitTests:CsrExclWrite"] + "excl:CsrAllTests:CsrExclAll"] } { name: "FIFO_CTRL", desc: "I2S FIFO control register", @@ -125,13 +127,17 @@ swaccess: "wo", hwaccess: "hro", name: "RXRST", - desc: "RX fifo reset. Write 1 to the register resets RX_FIFO. Read returns 0" + desc: "RX fifo reset. Write 1 to the register resets RX_FIFO. Read returns 0", + tags: [ + "excl:CsrAllTests:CsrExclAll"] } { bits: "1", swaccess: "wo", hwaccess: "hro", name: "TXRST", - desc: "TX fifo reset. Write 1 to the register resets TX_FIFO. Read returns 0" + desc: "TX fifo reset. Write 1 to the register resets TX_FIFO. Read returns 0", + tags: [ + "excl:CsrAllTests:CsrExclAll"] } { bits: "4:2", name: "RXILVL", @@ -203,7 +209,9 @@ name: "RXLVL", desc: "Current fill level of RX fifo" } - ] + ], + tags: [// FIFO_STATUS in read only + "excl:CsrAllTests:CsrExclWrite"] } ] }