| <style> |
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| table.regdef th { |
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| td.fname { |
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| td.regbits, td.regperm, td.regrv, td.regfn { |
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| table.cfgtable { |
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| p { |
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| } |
| </style> |
| <table class="regdef" id="RegSummary_{comp}"> |
| <tr> |
| <th class="regdef" colspan=4> Summary </th> |
| </tr> |
| <tr> |
| <th class="regdef">Name</th> <th class="regdef">Offset</th> <th class="regdef">Length</th> <th class="regdef">Description</th> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega0">REGA0</a></td> <td class="regfn">0x0</td> <td class="regfn">4</td> <td class="regfn"><p>AST Register 0 for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega1">REGA1</a></td> <td class="regfn">0x4</td> <td class="regfn">4</td> <td class="regfn"><p>AST 1 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega2">REGA2</a></td> <td class="regfn">0x8</td> <td class="regfn">4</td> <td class="regfn"><p>AST 2 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega3">REGA3</a></td> <td class="regfn">0xc</td> <td class="regfn">4</td> <td class="regfn"><p>AST 3 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega4">REGA4</a></td> <td class="regfn">0x10</td> <td class="regfn">4</td> <td class="regfn"><p>AST 4 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega5">REGA5</a></td> <td class="regfn">0x14</td> <td class="regfn">4</td> <td class="regfn"><p>AST 5 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega6">REGA6</a></td> <td class="regfn">0x18</td> <td class="regfn">4</td> <td class="regfn"><p>AST 6 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega7">REGA7</a></td> <td class="regfn">0x1c</td> <td class="regfn">4</td> <td class="regfn"><p>AST 7 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega8">REGA8</a></td> <td class="regfn">0x20</td> <td class="regfn">4</td> <td class="regfn"><p>AST 8 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega9">REGA9</a></td> <td class="regfn">0x24</td> <td class="regfn">4</td> <td class="regfn"><p>AST 9 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega10">REGA10</a></td> <td class="regfn">0x28</td> <td class="regfn">4</td> <td class="regfn"><p>AST 10 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega11">REGA11</a></td> <td class="regfn">0x2c</td> <td class="regfn">4</td> <td class="regfn"><p>AST 11 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega12">REGA12</a></td> <td class="regfn">0x30</td> <td class="regfn">4</td> <td class="regfn"><p>AST 13 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega13">REGA13</a></td> <td class="regfn">0x34</td> <td class="regfn">4</td> <td class="regfn"><p>AST 13 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega14">REGA14</a></td> <td class="regfn">0x38</td> <td class="regfn">4</td> <td class="regfn"><p>AST 14 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega15">REGA15</a></td> <td class="regfn">0x3c</td> <td class="regfn">4</td> <td class="regfn"><p>AST 15 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega16">REGA16</a></td> <td class="regfn">0x40</td> <td class="regfn">4</td> <td class="regfn"><p>AST 16 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega17">REGA17</a></td> <td class="regfn">0x44</td> <td class="regfn">4</td> <td class="regfn"><p>AST 17 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega18">REGA18</a></td> <td class="regfn">0x48</td> <td class="regfn">4</td> <td class="regfn"><p>AST 18 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega19">REGA19</a></td> <td class="regfn">0x4c</td> <td class="regfn">4</td> <td class="regfn"><p>AST 19 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega20">REGA20</a></td> <td class="regfn">0x50</td> <td class="regfn">4</td> <td class="regfn"><p>AST 20 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega21">REGA21</a></td> <td class="regfn">0x54</td> <td class="regfn">4</td> <td class="regfn"><p>AST 21 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega22">REGA22</a></td> <td class="regfn">0x58</td> <td class="regfn">4</td> <td class="regfn"><p>AST 22 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega23">REGA23</a></td> <td class="regfn">0x5c</td> <td class="regfn">4</td> <td class="regfn"><p>AST 23 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega24">REGA24</a></td> <td class="regfn">0x60</td> <td class="regfn">4</td> <td class="regfn"><p>AST 24 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega25">REGA25</a></td> <td class="regfn">0x64</td> <td class="regfn">4</td> <td class="regfn"><p>AST 25 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega26">REGA26</a></td> <td class="regfn">0x68</td> <td class="regfn">4</td> <td class="regfn"><p>AST 26 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega27">REGA27</a></td> <td class="regfn">0x6c</td> <td class="regfn">4</td> <td class="regfn"><p>AST 27 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega28">REGA28</a></td> <td class="regfn">0x70</td> <td class="regfn">4</td> <td class="regfn"><p>AST 28 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega29">REGA29</a></td> <td class="regfn">0x74</td> <td class="regfn">4</td> <td class="regfn"><p>AST 29 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega30">REGA30</a></td> <td class="regfn">0x78</td> <td class="regfn">4</td> <td class="regfn"><p>AST 30 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega31">REGA31</a></td> <td class="regfn">0x7c</td> <td class="regfn">4</td> <td class="regfn"><p>AST 31 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega32">REGA32</a></td> <td class="regfn">0x80</td> <td class="regfn">4</td> <td class="regfn"><p>AST 32 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega33">REGA33</a></td> <td class="regfn">0x84</td> <td class="regfn">4</td> <td class="regfn"><p>AST 33 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega34">REGA34</a></td> <td class="regfn">0x88</td> <td class="regfn">4</td> <td class="regfn"><p>AST 34 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega35">REGA35</a></td> <td class="regfn">0x8c</td> <td class="regfn">4</td> <td class="regfn"><p>AST 35 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega36">REGA36</a></td> <td class="regfn">0x90</td> <td class="regfn">4</td> <td class="regfn"><p>AST 36 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_rega37">REGA37</a></td> <td class="regfn">0x94</td> <td class="regfn">4</td> <td class="regfn"><p>AST 37 Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_regal">REGAL</a></td> <td class="regfn">0x98</td> <td class="regfn">4</td> <td class="regfn"><p>AST Last Register for OTP/ROM Write Testing</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_regb_0">REGB_0</a></td> <td class="regfn">0x200</td> <td class="regfn">4</td> <td class="regfn"><p>AST Registers Array-B to set address space size</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_regb_1">REGB_1</a></td> <td class="regfn">0x204</td> <td class="regfn">4</td> <td class="regfn"><p>AST Registers Array-B to set address space size</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_regb_2">REGB_2</a></td> <td class="regfn">0x208</td> <td class="regfn">4</td> <td class="regfn"><p>AST Registers Array-B to set address space size</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_regb_3">REGB_3</a></td> <td class="regfn">0x20c</td> <td class="regfn">4</td> <td class="regfn"><p>AST Registers Array-B to set address space size</p></td> </tr> |
| <tr> |
| <td class="regfn">ast.<a href="#Reg_regb_4">REGB_4</a></td> <td class="regfn">0x210</td> <td class="regfn">4</td> <td class="regfn"><p>AST Registers Array-B to set address space size</p></td> </tr> |
| </table><table class="regdef" id="Reg_rega0"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega0">REGA0</a> @ 0x0</div> |
| <div><p>AST Register 0 for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x0, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">ro</td><td class="regrv">0x0</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega1"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega1">REGA1</a> @ 0x4</div> |
| <div><p>AST 1 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x1, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">ro</td><td class="regrv">0x1</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega2"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega2">REGA2</a> @ 0x8</div> |
| <div><p>AST 2 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x2, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x2</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega3"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega3">REGA3</a> @ 0xc</div> |
| <div><p>AST 3 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x3, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x3</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega4"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega4">REGA4</a> @ 0x10</div> |
| <div><p>AST 4 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x4, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x4</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega5"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega5">REGA5</a> @ 0x14</div> |
| <div><p>AST 5 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x5, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x5</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega6"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega6">REGA6</a> @ 0x18</div> |
| <div><p>AST 6 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x6, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x6</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega7"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega7">REGA7</a> @ 0x1c</div> |
| <div><p>AST 7 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x7, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x7</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega8"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega8">REGA8</a> @ 0x20</div> |
| <div><p>AST 8 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x8, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x8</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega9"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega9">REGA9</a> @ 0x24</div> |
| <div><p>AST 9 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x9, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x9</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega10"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega10">REGA10</a> @ 0x28</div> |
| <div><p>AST 10 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0xa, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0xa</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega11"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega11">REGA11</a> @ 0x2c</div> |
| <div><p>AST 11 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0xb, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0xb</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega12"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega12">REGA12</a> @ 0x30</div> |
| <div><p>AST 13 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0xc, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0xc</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega13"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega13">REGA13</a> @ 0x34</div> |
| <div><p>AST 13 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0xd, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0xd</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega14"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega14">REGA14</a> @ 0x38</div> |
| <div><p>AST 14 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0xe, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0xe</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega15"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega15">REGA15</a> @ 0x3c</div> |
| <div><p>AST 15 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0xf, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0xf</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega16"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega16">REGA16</a> @ 0x40</div> |
| <div><p>AST 16 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x10, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x10</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega17"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega17">REGA17</a> @ 0x44</div> |
| <div><p>AST 17 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x11, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x11</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega18"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega18">REGA18</a> @ 0x48</div> |
| <div><p>AST 18 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x12, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x12</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega19"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega19">REGA19</a> @ 0x4c</div> |
| <div><p>AST 19 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x13, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x13</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega20"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega20">REGA20</a> @ 0x50</div> |
| <div><p>AST 20 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x14, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x14</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega21"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega21">REGA21</a> @ 0x54</div> |
| <div><p>AST 21 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x15, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x15</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega22"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega22">REGA22</a> @ 0x58</div> |
| <div><p>AST 22 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x16, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x16</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega23"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega23">REGA23</a> @ 0x5c</div> |
| <div><p>AST 23 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x17, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x17</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega24"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega24">REGA24</a> @ 0x60</div> |
| <div><p>AST 24 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x18, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x18</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega25"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega25">REGA25</a> @ 0x64</div> |
| <div><p>AST 25 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x19, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x19</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega26"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega26">REGA26</a> @ 0x68</div> |
| <div><p>AST 26 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x1a, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x1a</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega27"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega27">REGA27</a> @ 0x6c</div> |
| <div><p>AST 27 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x1b, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x1b</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega28"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega28">REGA28</a> @ 0x70</div> |
| <div><p>AST 28 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x1c, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">ro</td><td class="regrv">0x1c</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega29"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega29">REGA29</a> @ 0x74</div> |
| <div><p>AST 29 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x1d, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x1d</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega30"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega30">REGA30</a> @ 0x78</div> |
| <div><p>AST 30 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x1e, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x1e</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega31"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega31">REGA31</a> @ 0x7c</div> |
| <div><p>AST 31 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x1f, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x1f</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega32"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega32">REGA32</a> @ 0x80</div> |
| <div><p>AST 32 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x20, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x20</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega33"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega33">REGA33</a> @ 0x84</div> |
| <div><p>AST 33 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x21, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x21</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega34"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega34">REGA34</a> @ 0x88</div> |
| <div><p>AST 34 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x22, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x22</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega35"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega35">REGA35</a> @ 0x8c</div> |
| <div><p>AST 35 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x23, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x23</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega36"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega36">REGA36</a> @ 0x90</div> |
| <div><p>AST 36 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x24, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x24</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_rega37"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_rega37">REGA37</a> @ 0x94</div> |
| <div><p>AST 37 Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x25, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x25</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_regal"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_regal">REGAL</a> @ 0x98</div> |
| <div><p>AST Last Register for OTP/ROM Write Testing</p></div> |
| <div>Reset default = 0x26, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">wo</td><td class="regrv">0x26</td><td class="regfn">reg32</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_regb_0"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_regb_0">REGB_0</a> @ 0x200</div> |
| <div><p>AST Registers Array-B to set address space size</p></div> |
| <div>Reset default = 0x0, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32_0...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32_0</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x0</td><td class="regfn">reg32_0</td><td class="regde"><p><p>32-bit Register</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_regb_1"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_regb_1">REGB_1</a> @ 0x204</div> |
| <div><p>AST Registers Array-B to set address space size</p></div> |
| <div>Reset default = 0x0, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32_1...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32_1</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x0</td><td class="regfn">reg32_1</td><td class="regde"><p><p>For REGB1</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_regb_2"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_regb_2">REGB_2</a> @ 0x208</div> |
| <div><p>AST Registers Array-B to set address space size</p></div> |
| <div>Reset default = 0x0, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32_2...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32_2</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x0</td><td class="regfn">reg32_2</td><td class="regde"><p><p>For REGB2</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_regb_3"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_regb_3">REGB_3</a> @ 0x20c</div> |
| <div><p>AST Registers Array-B to set address space size</p></div> |
| <div>Reset default = 0x0, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32_3...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32_3</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x0</td><td class="regfn">reg32_3</td><td class="regde"><p><p>For REGB3</p></p></td></table> |
| <br> |
| <table class="regdef" id="Reg_regb_4"> |
| <tr> |
| <th class="regdef" colspan=5> |
| <div>ast.<a href="#Reg_regb_4">REGB_4</a> @ 0x210</div> |
| <div><p>AST Registers Array-B to set address space size</p></div> |
| <div>Reset default = 0x0, mask 0xffffffff</div> |
| </th> |
| </tr> |
| <tr><td colspan=5><table class="regpic"><tr><td class="bitnum">31</td><td class="bitnum">30</td><td class="bitnum">29</td><td class="bitnum">28</td><td class="bitnum">27</td><td class="bitnum">26</td><td class="bitnum">25</td><td class="bitnum">24</td><td class="bitnum">23</td><td class="bitnum">22</td><td class="bitnum">21</td><td class="bitnum">20</td><td class="bitnum">19</td><td class="bitnum">18</td><td class="bitnum">17</td><td class="bitnum">16</td></tr><tr><td class="fname" colspan=16>reg32_4...</td> |
| </tr> |
| <tr><td class="bitnum">15</td><td class="bitnum">14</td><td class="bitnum">13</td><td class="bitnum">12</td><td class="bitnum">11</td><td class="bitnum">10</td><td class="bitnum">9</td><td class="bitnum">8</td><td class="bitnum">7</td><td class="bitnum">6</td><td class="bitnum">5</td><td class="bitnum">4</td><td class="bitnum">3</td><td class="bitnum">2</td><td class="bitnum">1</td><td class="bitnum">0</td></tr><tr><td class="fname" colspan=16>...reg32_4</td> |
| </tr></table></td></tr> |
| <tr><th width=5%>Bits</th><th width=5%>Type</th><th width=5%>Reset</th><th>Name</th><th>Description</th></tr><tr><td class="regbits">31:0</td><td class="regperm">rw</td><td class="regrv">0x0</td><td class="regfn">reg32_4</td><td class="regde"><p><p>For REGB4</p></p></td></table> |
| <br> |
