Add device configuration for ASIC

- For now, just copied the settings of Nexus. Change as needed in the
  future to match the configuration of the ASIC.

  b/301618620

Change-Id: Idf07bc174cad896e5a8819865498b11b756f4938

rules/matcha.bzl

diff --git a/rules/matcha.bzl b/rules/matcha.bzl
index c83860c..9d87d2c 100644
--- a/rules/matcha.bzl
+++ b/rules/matcha.bzl
@@ -48,6 +48,11 @@
     "smc": "//sw/device/lib/arch:smc_fpga_nexus",
 }
 
+ASIC_CORE_TARGETS = {
+    "secure_core": "//sw/device/lib/arch:sc_asic",
+    "smc": "//sw/device/lib/arch:smc_asic",
+}
+
 # This helper function generates a dictionary of per-device dependencies which is used to
 # generate slightly different binaries for each hardware target, including two
 # simulation platforms (DV and Verilator), and one FPGA platform (Nexus),
@@ -57,6 +62,7 @@
         "sim_verilator": [VERILATOR_CORE_TARGETS.get(core)],
         "sim_dv": [DV_CORE_TARGETS.get(core)],
         "fpga_nexus": [NEXUS_CORE_TARGETS.get(core)],
+        "asic": [ASIC_CORE_TARGETS.get(core)],
     }
     return per_device_deps
 

sw/device/lib/arch/BUILD

diff --git a/sw/device/lib/arch/BUILD b/sw/device/lib/arch/BUILD
index 373534e..b0bc154 100644
--- a/sw/device/lib/arch/BUILD
+++ b/sw/device/lib/arch/BUILD
@@ -43,3 +43,19 @@
         ":device",
     ],
 )
+
+cc_library(
+    name = "sc_asic",
+    srcs = ["device_sc_asic.c"],
+    deps = [
+        ":device",
+    ],
+)
+
+cc_library(
+    name = "smc_asic",
+    srcs = ["device_smc_asic.c"],
+    deps = [
+        ":device",
+    ],
+)

sw/device/lib/arch/device.h

diff --git a/sw/device/lib/arch/device.h b/sw/device/lib/arch/device.h
index 085f5db..8ba3187 100644
--- a/sw/device/lib/arch/device.h
+++ b/sw/device/lib/arch/device.h
@@ -44,6 +44,10 @@
    * Represents the Nexus FPGA device, for Shodan.
    */
   kDeviceFpgaNexus = 2,
+  /**
+   * Represents the ASIC variant of the design.
+   */
+  kDeviceAsic = 3,
 } device_type_t;
 
 /**

sw/device/lib/arch/device_sc_asic.c

diff --git a/sw/device/lib/arch/device_sc_asic.c b/sw/device/lib/arch/device_sc_asic.c
new file mode 100644
index 0000000..86bfaf7
--- /dev/null
+++ b/sw/device/lib/arch/device_sc_asic.c
@@ -0,0 +1,47 @@
+// Copyright 2023 Google LLC.
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+
+#include "sw/device/lib/arch/device.h"
+
+/**
+ * @file
+ * @brief Device-specific symbol definitions for the ASIC device. Copied from
+ * Nexus.
+ */
+
+const device_type_t kDeviceType = kDeviceAsic;
+
+const uint64_t kClockFreqCpuMhz = 10;
+
+const uint64_t kClockFreqCpuHz = kClockFreqCpuMhz * 1000 * 1000;
+
+uint64_t to_cpu_cycles(uint64_t usec) { return usec * kClockFreqCpuMhz; }
+
+const uint64_t kClockFreqPeripheralHz = 25 * 100 * 1000;  // 2.5MHz
+
+const uint64_t kClockFreqUsbHz = 48 * 1000 * 1000;  // 48MHz
+
+const uint64_t kClockFreqAonHz = 250 * 1000;  // 250kHz
+
+const uint64_t kUartBaudrate = 115200;
+
+const uint32_t kUartNCOValue =
+    CALCULATE_UART_NCO(kUartBaudrate, kClockFreqPeripheralHz);
+
+const uint32_t kUartTxFifoCpuCycles =
+    CALCULATE_UART_TX_FIFO_CPU_CYCLES(kUartBaudrate, kClockFreqCpuHz);
+
+const uint32_t kAstCheckPollCpuCycles =
+    CALCULATE_AST_CHECK_POLL_CPU_CYCLES(kClockFreqCpuHz);
+
+const uintptr_t kDeviceTestStatusAddress = 0;
+
+const uintptr_t kDeviceLogBypassUartAddress = 0;
+
+const bool kJitterEnabled = false;
+
+void device_fpga_version_print(void) {}

sw/device/lib/arch/device_smc_asic.c

diff --git a/sw/device/lib/arch/device_smc_asic.c b/sw/device/lib/arch/device_smc_asic.c
new file mode 100644
index 0000000..4642a44
--- /dev/null
+++ b/sw/device/lib/arch/device_smc_asic.c
@@ -0,0 +1,46 @@
+// Copyright 2023 Google LLC.
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <assert.h>
+#include <stdbool.h>
+
+#include "sw/device/lib/arch/device.h"
+
+/**
+ * @file
+ * @brief Device-specific symbol definitions for the ASIC SMC device.
+ */
+
+const device_type_t kDeviceType = kDeviceAsic;
+
+// 10 MHz
+const uint64_t kClockFreqCpuMhz = 10;
+
+const uint64_t kClockFreqCpuHz = kClockFreqCpuMhz * 1000 * 1000;
+
+uint64_t to_cpu_cycles(uint64_t usec) { return usec * kClockFreqCpuMhz; }
+
+const uint64_t kClockFreqPeripheralHz = 25 * 100 * 1000;  // 2.5MHz
+
+const uint64_t kClockFreqUsbHz = 48 * 1000 * 1000;  // 48MHz
+
+const uint64_t kClockFreqAonHz = 250 * 1000;  // 250kHz
+
+const uint64_t kUartBaudrate = 115200;
+
+const uint32_t kUartNCOValue =
+    CALCULATE_UART_NCO(kUartBaudrate, kClockFreqPeripheralHz);
+
+const uint32_t kUartTxFifoCpuCycles =
+    CALCULATE_UART_TX_FIFO_CPU_CYCLES(kUartBaudrate, kClockFreqCpuHz);
+
+const uint32_t kAstCheckPollCpuCycles =
+    CALCULATE_AST_CHECK_POLL_CPU_CYCLES(kClockFreqCpuHz);
+
+const uintptr_t kDeviceTestStatusAddress = 0x0;
+
+const uintptr_t kDeviceLogBypassUartAddress = 0;
+
+const bool kJitterEnabled = false;