blob: c59e2b9276c95bd9c3c36e101243daf1d19c1ffd [file]
// Copyright 2022 Google LLC.
// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
#ifndef SW_DEVICE_LIB_TESTING_PINMUX_TESTUTILS_H_
#define SW_DEVICE_LIB_TESTING_PINMUX_TESTUTILS_H_
#include <stdint.h>
#include "sw/device/lib/dif/dif_gpio.h"
#include "sw/device/lib/dif/dif_pinmux.h"
/**
* Default pinmux initialization.
*
* Initializes GPIOs to map to the lowest-numbered MIOs, except where it
* conflicts with UARTs. Then initializes 2 UART mappings to (IOC3,IOC10) and
* (IOC4,IOC10), denoted as (RX pin,TX pin).
*
* This function is specific to top_matcha
*/
void pinmux_testutils_init(dif_pinmux_t *pinmux);
extern const dif_pinmux_index_t kPinmuxTestutilsGpioInselPins[kDifGpioNumPins];
extern const dif_pinmux_index_t kPinmuxTestutilsGpioMioOutPins[kDifGpioNumPins];
/**
* Returns the mask of testable GPIO pins.
*
* Returns a simulation-device-specific mask that enables testing of only a
* subset of GPIOs depending on the IO allocation limitations.
*/
uint32_t pinmux_testutils_get_testable_gpios_mask(void);
/**
* A convenience struct to associate pad attributes with a specific pad.
*/
typedef struct pinmux_pad_attributes {
dif_pinmux_index_t pad;
dif_pinmux_pad_kind_t kind;
dif_pinmux_pad_attr_flags_t flags;
} pinmux_pad_attributes_t;
/**
* Configures several pad attributes.
*/
void pinmux_testutils_configure_pads(const dif_pinmux_t *pinmux,
const pinmux_pad_attributes_t *attrs,
size_t num_attrs);
/**
* Configures several Matcha peripherals
*/
dif_result_t pinmux_testutils_configure_i2s_tx(const dif_pinmux_t *pinmux);
dif_result_t pinmux_testutils_configure_i2s_rx(const dif_pinmux_t *pinmux);
dif_result_t pinmux_testutils_configure_cam_i2c(const dif_pinmux_t *pinmux);
dif_result_t pinmux_testutils_configure_isp_wrapper(const dif_pinmux_t *pinmux);
dif_result_t pinmux_testutils_configure_cam_ctrl(const dif_pinmux_t *pinmux);
#endif // SW_DEVICE_LIB_TESTING_PINMUX_TESTUTILS_H_