sw/device/tests/kelvin/fpga_tests/kelvin_test_sc.c

// Copyright 2023 Google LLC

#include "hw/top_matcha/ip/ml_top/data/ml_top_regs.h"  // Generated.
#include "hw/top_matcha/sw/autogen/top_matcha.h"
#include "sw/device/lib/arch/device.h"
#include "sw/device/lib/dif/dif_smc_ctrl.h"
#include "sw/device/lib/dif/dif_uart.h"
#include "sw/device/lib/runtime/print.h"
#include "sw/device/lib/testing/test_framework/check.h"
#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
#include "sw/device/lib/testing/test_framework/status.h"
#include "sw/device/lib/testing/test_framework/test_util.h"
#include "sw/device/tests/kelvin/fpga_tests/kelvin_test_sc_loaders.h"

/*
 * Sample program to run some code on all cores in the system.
 * SC - Orchestrate the other cores, print status to UART.
 * SMC - Print to UART.
 * Kelvin - SW program built to run on Kelvin.
 */

OTTF_DEFINE_TEST_CONFIG();

static dif_smc_ctrl_t smc_ctrl;
static dif_uart_t uart;

void _ottf_main(void) {
  test_status_set(kTestStatusInTest);
  init_uart(TOP_MATCHA_UART0_BASE_ADDR, &uart);
  LOG_INFO("kelvin_test_sc");
  // Do any initialization needed before loading SMC and Kelvin.
  load_init();

  // Copy binary to SMC RAM.
  load_smc();

  mmio_region_t ml_dmem =
      mmio_region_from_addr(TOP_MATCHA_ML_TOP_DMEM_BASE_ADDR);

  // Fill the memory with zeroes.
  for (int i = 0; i < TOP_MATCHA_ML_TOP_DMEM_SIZE_BYTES / sizeof(uint32_t);
       ++i) {
    mmio_region_write32(ml_dmem, i * sizeof(uint32_t), 0);
  }

  // Copy binary to ML_DMEM.
  load_kelvin();

  // Enable SMC.
  CHECK_DIF_OK(dif_smc_ctrl_init(
      mmio_region_from_addr(TOP_MATCHA_SMC_CTRL_BASE_ADDR), &smc_ctrl));
  CHECK_DIF_OK(dif_smc_ctrl_set_en(&smc_ctrl));

  // Start up Kelvin.
  mmio_region_t base_addr =
      mmio_region_from_addr(TOP_MATCHA_ML_TOP_CORE_BASE_ADDR);
  mmio_region_write32(base_addr, ML_TOP_CTRL_REG_OFFSET,
                      ML_TOP_CTRL_REG_RESVAL);
  mmio_region_write32(base_addr, ML_TOP_CTRL_REG_OFFSET, 0x0);
  uint32_t intr_state =
      mmio_region_read32(base_addr, ML_TOP_INTR_STATE_REG_OFFSET);
  // TODO(ykwang): Change this to interrupt handler.
  while (intr_state == 0x0) {
    intr_state = mmio_region_read32(base_addr, ML_TOP_INTR_STATE_REG_OFFSET);
    busy_spin_micros(10 * 1000);  // Wait for 10ms.
  }

  LOG_INFO("Kelvin finished executing.");
  // Received interrupts from Kelvin core, check if only FINISH asserted
  CHECK(intr_state == (1 << ML_TOP_INTR_STATE_FINISH_BIT),
        "INTR_STATE read out: expected : 0x%x | actual: 0x%x",
        (1 << ML_TOP_INTR_STATE_FINISH_BIT), intr_state);

  test_status_set(kTestStatusPassed);
  asm volatile("wfi");
}