Enable kelvin dv tests Bug: 295926299 Bug: 287644985 Change-Id: Ie30851b6b0a12cbc9c961b79a1fef8d4e9e4c648
diff --git a/hw/dv/tools/dvsim/sim.mk b/hw/dv/tools/dvsim/sim.mk index d803100..0325477 100644 --- a/hw/dv/tools/dvsim/sim.mk +++ b/hw/dv/tools/dvsim/sim.mk
@@ -85,7 +85,7 @@ flags=(`echo $$sw_image | cut -d: -f 4- --output-delimiter " "`); \ bazel_label="`echo $$sw_image | cut -d: -f 1-2`"; \ build_repo="opentitan"; \ - if [[ $${index} != 4 ]]; then \ + if [[ $${index} != 4 && $${index} != 7 ]]; then \ bazel_label="$${bazel_label}_$${sw_build_device}"; \ bazel_cquery="labels(data, $${bazel_label}) union labels(srcs, $${bazel_label})"; \ else \
diff --git a/hw/top_matcha/dv/chip_sim_cfg.hjson b/hw/top_matcha/dv/chip_sim_cfg.hjson index 3c5cf48..7ed049b 100644 --- a/hw/top_matcha/dv/chip_sim_cfg.hjson +++ b/hw/top_matcha/dv/chip_sim_cfg.hjson
@@ -454,7 +454,9 @@ { name: chip_sw_smc_kelvin_hello_test uvm_test_seq: chip_sw_base_vseq - sw_images: ["//sw/device/tests/smc:smc_kelvin_hello_test:6:matcha"] + sw_images: [ + "//sw/device/tests/smc:smc_kelvin_hello_test:6:matcha", + "//sw/device/tests/kelvin/testdata:kelvin_hello_world:7:matcha"] en_run_modes: ["sw_test_mode_test_simple_sec"] run_opts:["+sw_test_timeout_ns=40_000_000"] } @@ -2125,6 +2127,7 @@ "chip_sw_smc_isp_wrapper_irq_test", "chip_sw_smc_isp_wrapper_test", "chip_sw_smc_isp_wrapper_tpg_64_64_test", + "chip_sw_smc_kelvin_hello_test", "chip_sw_smc_lsu_interrupt_boundary_test", "chip_sw_smc_lsu_page_boundary_test", "chip_sw_smc_ml_sram_smoketest",
diff --git a/hw/top_matcha/dv/env/chip_env_cfg.sv b/hw/top_matcha/dv/env/chip_env_cfg.sv index 6f630a7..dd3aadb 100644 --- a/hw/top_matcha/dv/env/chip_env_cfg.sv +++ b/hw/top_matcha/dv/env/chip_env_cfg.sv
@@ -386,7 +386,8 @@ // Finalize the SW image paths, once all SW image settings are done. virtual function void resolve_sw_image_paths(); foreach (sw_images[i]) begin - if ("prebuilt" inside {sw_image_flags[i]}) begin + if ("prebuilt" inside {sw_image_flags[i]} || + i == SwTypeML) begin sw_images[i] = $sformatf("%0s", sw_images[i]); end else begin if (i == SwTypeRom) begin
diff --git a/hw/top_matcha/dv/env/chip_env_pkg.sv b/hw/top_matcha/dv/env/chip_env_pkg.sv index 874577e..2cf0366 100644 --- a/hw/top_matcha/dv/env/chip_env_pkg.sv +++ b/hw/top_matcha/dv/env/chip_env_pkg.sv
@@ -92,7 +92,8 @@ RamMain[16], RamRet[16], Rom, - Smc_ram + Smc_ram, + ML_ram } chip_mem_e; // On OpenTitan, we deal with 4 types of SW - ROM, the main test, the OTBN test and the OTP image. @@ -104,7 +105,8 @@ SwTypeOtbn = 3, // Otbn SW SwTypeOtp = 4, // Customized OTP image SwTypeDebug = 5, // Debug SW - injected into SRAM. - SwTypeSmc = 6 // SMC SW + SwTypeSmc = 6, // SMC SW + SwTypeML = 7 // ML SW } sw_type_e; // Our dvsim.py configuration always generates five base OTP images (in various lifecycle states)
diff --git a/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv b/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv index ad8fdc2..1f6851d 100644 --- a/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv +++ b/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv
@@ -129,11 +129,16 @@ cfg.mem_bkdr_util_h[FlashBank1Data].load_mem_from_file( {cfg.sw_images[SwTypeTestSlotB], ".64.scr.vmem"}); end - // SMC RAM sw imsage load + // SMC RAM sw image load if (cfg.sw_images.exists(SwTypeSmc)) begin cfg.mem_bkdr_util_h[Smc_ram].load_mem_from_file( {cfg.sw_images[SwTypeSmc], ".32.vmem"}); end + // ML RAM sw image load + if (cfg.sw_images.exists(SwTypeML)) begin + cfg.mem_bkdr_util_h[ML_ram].load_mem_from_file( + {cfg.sw_images[SwTypeML], ".256.vmem"}); + end config_jitter();
diff --git a/hw/top_matcha/dv/tb/chip_hier_macros.svh b/hw/top_matcha/dv/tb/chip_hier_macros.svh index 233bf05..4412648 100644 --- a/hw/top_matcha/dv/tb/chip_hier_macros.svh +++ b/hw/top_matcha/dv/tb/chip_hier_macros.svh
@@ -65,3 +65,4 @@ `define OTBN_IMEM_HIER `OTBN_HIER.u_imem.u_prim_ram_1p_adv.u_mem.`MEM_ARRAY_SUB `define OTBN_DMEM_HIER `OTBN_HIER.u_dmem.u_prim_ram_1p_adv.u_mem.`MEM_ARRAY_SUB `define SMC_RAM_HIER `CHIP_HIER.u_ram1p_ram_smc.u_mem.`MEM_ARRAY_SUB +`define ML_RAM_HIER `CHIP_HIER.u_ml_top.u_ml_dmem.u_ram1p_dmem.u_mem.`MEM_ARRAY_SUB
diff --git a/hw/top_matcha/dv/tb/tb.sv b/hw/top_matcha/dv/tb/tb.sv index 3dafc56..7d61ddb 100644 --- a/hw/top_matcha/dv/tb/tb.sv +++ b/hw/top_matcha/dv/tb/tb.sv
@@ -398,6 +398,16 @@ .system_base_addr (top_matcha_pkg::TOP_MATCHA_RAM_SMC_BASE_ADDR)); `MEM_BKDR_UTIL_FILE_OP(m_mem_bkdr_util[Smc_ram], `SMC_RAM_HIER) + `uvm_info("tb.sv", "Creating mem_bkdr_util instance for ML_RAM", UVM_MEDIUM) + m_mem_bkdr_util[ML_ram] = new( + .name ("mem_bkdr_util[ML_ram]"), + .path (`DV_STRINGIFY(`ML_RAM_HIER)), + .depth ($size(`ML_RAM_HIER)), + .n_bits($bits(`ML_RAM_HIER)), + .err_detection_scheme(mem_bkdr_util_pkg::ErrDetectionNone), + .system_base_addr (top_matcha_pkg::TOP_MATCHA_RAM_ML_DMEM_BASE_ADDR)); + `MEM_BKDR_UTIL_FILE_OP(m_mem_bkdr_util[ML_ram], `ML_RAM_HIER) + `uvm_info("tb.sv", "Creating mem_bkdr_util instance for ROM", UVM_MEDIUM) m_mem_bkdr_util[Rom] = new( .name ("mem_bkdr_util[Rom]"),
diff --git a/sw/device/tests/kelvin/testdata/BUILD b/sw/device/tests/kelvin/testdata/BUILD new file mode 100644 index 0000000..9b00741 --- /dev/null +++ b/sw/device/tests/kelvin/testdata/BUILD
@@ -0,0 +1,8 @@ +# Copyright 2023 Google contributors. + +package(default_visibility = ["//visibility:public"]) + +filegroup( + name = "kelvin_hello_world", + srcs = ["kelvin_hello_world.256.vmem"], +)
diff --git a/sw/device/tests/kelvin/testdata/kelvin_hello_world.256.vmem b/sw/device/tests/kelvin/testdata/kelvin_hello_world.256.vmem new file mode 100755 index 0000000..ec7f4b2 --- /dev/null +++ b/sw/device/tests/kelvin/testdata/kelvin_hello_world.256.vmem
@@ -0,0 +1,12 @@ +/* http://srecord.sourceforge.net/ */ +@00000000 0000041300000393000003130000021394C18193000011970001011310020117 +@00000001 0000089300000813000007930000071300000693000006130000059300000493 +@00000002 00000C9300000C1300000B9300000B1300000A9300000A130000099300000913 +@00000003 200005932000051300000F9300000F1300000E9300000E1300000D9300000D13 +@00000004 FE946AE300440413000280E70004228300947A631540049315400413064000EF +@00000005 001007B70000006F08000073000080E701408093000000970000059300000513 +@00000006 0000051326000077FED798E3FEE7AE2300170713004787930007A703001016B7 +@00000007 FEB56CE3004505130005202300029E630032F29300B562B302B5706300008067 +@00000008 0032F29300C2E2B300B562B302B57C63C00010730000806700B5146300008067 +@00000009 004505130055202300460613000622830262E26340A5833340C502B302029863 +@0000000A FFFFFFFFC00010730000806700B51463 00008067FEB568E3
diff --git a/sw/device/tests/smc/BUILD b/sw/device/tests/smc/BUILD index 66f08d0..730246a 100644 --- a/sw/device/tests/smc/BUILD +++ b/sw/device/tests/smc/BUILD
@@ -274,12 +274,11 @@ ], per_device_deps = { "sim_verilator": [VERILATOR_CORE_TARGETS.get("smc")], - "sim_dv": ["@lowrisc_opentitan//sw/device/lib/arch:sim_dv"], + "sim_dv": ["//sw/device/lib/arch:smc_sim_dv"], }, deps = [ "//hw/top_matcha/ip/ml_top/data:ml_top_regs", "//sw/device/tests:test_lib_smc", - "@lowrisc_opentitan//sw/device/silicon_creator/lib:manifest_def", ], ) @@ -295,12 +294,11 @@ ], per_device_deps = { "sim_verilator": [VERILATOR_CORE_TARGETS.get("smc")], - "sim_dv": ["@lowrisc_opentitan//sw/device/lib/arch:sim_dv"], + "sim_dv": ["//sw/device/lib/arch:smc_sim_dv"], }, deps = [ "//hw/top_matcha/ip/ml_top/data:ml_top_regs", "//sw/device/tests:test_lib_smc", - "@lowrisc_opentitan//sw/device/silicon_creator/lib:manifest_def", ], )
diff --git a/sw/device/tests/smc/smc_kelvin_hello_test.c b/sw/device/tests/smc/smc_kelvin_hello_test.c index 60297a5..d10be11 100644 --- a/sw/device/tests/smc/smc_kelvin_hello_test.c +++ b/sw/device/tests/smc/smc_kelvin_hello_test.c
@@ -93,7 +93,7 @@ while (intr_state == 0x0) { intr_state = mmio_region_read32(base_addr, ML_TOP_INTR_STATE_REG_OFFSET); - busy_spin_micros(10 * 1000); + busy_spin_micros(200); } // Received interrupts from Kelvin core, check if only FINISH asserted