| /* |
| * Copyright 2023 Google LLC |
| * Copyright lowRISC contributors |
| * |
| * Licensed under the Apache License, Version 2.0 (the "License"); |
| * you may not use this file except in compliance with the License. |
| * You may obtain a copy of the License at |
| * |
| * http://www.apache.org/licenses/LICENSE-2.0 |
| * |
| * Unless required by applicable law or agreed to in writing, software |
| * distributed under the License is distributed on an "AS IS" BASIS, |
| * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| * See the License for the specific language governing permissions and |
| * limitations under the License. |
| */ |
| |
| |
| #include "sw/device/lib/dif/dif_ml_top.h" |
| |
| #include <stddef.h> |
| |
| #include "sw/device/lib/base/bitfield.h" |
| #include "sw/device/lib/base/macros.h" |
| #include "sw/device/lib/dif/dif_base.h" |
| |
| #include "ml_top_regs.h" // Generated. |
| |
| dif_result_t dif_ml_top_reset_ctrl_en(const dif_ml_top_t *ml_top) { |
| if (ml_top == NULL) { |
| return kDifBadArg; |
| } |
| |
| mmio_region_write32( |
| ml_top->base_addr, ML_TOP_CTRL_REG_OFFSET, ML_TOP_CTRL_REG_RESVAL); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_ml_top_release_ctrl_en(const dif_ml_top_t *ml_top) { |
| if (ml_top == NULL) { |
| return kDifBadArg; |
| } |
| |
| mmio_region_write32(ml_top->base_addr, ML_TOP_CTRL_REG_OFFSET, 0x0); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_ml_top_resume_ctrl_en(const dif_ml_top_t *ml_top, uint32_t pc) { |
| if (ml_top == NULL) { |
| return kDifBadArg; |
| } |
| if (pc >= 0x400000) { |
| return kDifBadArg; |
| } |
| uint32_t ctrl_en = 0; |
| ctrl_en = bitfield_field32_write(ctrl_en, ML_TOP_CTRL_PC_START_FIELD, pc); |
| mmio_region_write32(ml_top->base_addr, ML_TOP_CTRL_REG_OFFSET, ctrl_en); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_ml_top_read_ctrl_en(const dif_ml_top_t *ml_top, uint32_t *result) { |
| if (ml_top == NULL) { |
| return kDifBadArg; |
| } |
| |
| *result = mmio_region_read32(ml_top->base_addr, ML_TOP_CTRL_REG_OFFSET); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_ml_top_reset_intr_en(const dif_ml_top_t *ml_top) { |
| if (ml_top == NULL) { |
| return kDifBadArg; |
| } |
| |
| mmio_region_write32( |
| ml_top->base_addr, ML_TOP_INTR_ENABLE_REG_OFFSET, ML_TOP_INTR_ENABLE_REG_RESVAL); |
| return kDifOk; |
| } |
| |
| dif_result_t dif_ml_top_read_intr_en(const dif_ml_top_t *ml_top, uint32_t *result) { |
| if (ml_top == NULL) { |
| return kDifBadArg; |
| } |
| |
| *result = mmio_region_read32(ml_top->base_addr, ML_TOP_INTR_ENABLE_REG_OFFSET); |
| return kDifOk; |
| } |