| /* |
| * Copyright 2023 Google LLC |
| * Copyright lowRISC contributors |
| * |
| * Licensed under the Apache License, Version 2.0 (the "License"); |
| * you may not use this file except in compliance with the License. |
| * You may obtain a copy of the License at |
| * |
| * http://www.apache.org/licenses/LICENSE-2.0 |
| * |
| * Unless required by applicable law or agreed to in writing, software |
| * distributed under the License is distributed on an "AS IS" BASIS, |
| * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| * See the License for the specific language governing permissions and |
| * limitations under the License. |
| */ |
| |
| |
| #include <stdbool.h> |
| |
| #include "sw/device/lib/arch/device.h" |
| |
| /** |
| * Device-specific symbol definitions for the Verilator device. |
| */ |
| |
| const device_type_t kDeviceType = kDeviceSimDV; |
| |
| // TODO: DV testbench completely randomizes these. Need to add code to |
| // retrieve these from a preloaded memory location set by the testbench. |
| |
| const uint64_t kClockFreqCpuMhz = 96; |
| |
| const uint64_t kClockFreqCpuHz = kClockFreqCpuMhz * 1000 * 1000; |
| |
| uint64_t to_cpu_cycles(uint64_t usec) { return usec * kClockFreqCpuMhz; } |
| |
| const uint64_t kClockFreqHiSpeedPeripheralHz = 96 * 1000 * 1000; // 96MHz |
| |
| const uint64_t kClockFreqPeripheralHz = 24 * 1000 * 1000; // 24MHz |
| |
| const uint64_t kClockFreqUsbHz = 48 * 1000 * 1000; // 48MHz |
| |
| const uint64_t kClockFreqAonHz = 200 * 1000; // 200kHz |
| |
| const uint64_t kClockFreqSpiFlashHz = 5 * 1000 * 1000; // 5MHz |
| const uint64_t kClockFreqSpiDisplayHz = 5 * 1000 * 1000; // 5MHz |
| const uint64_t kClockFreqSpiPassthroughHz = 5 * 1000 * 1000; // 5MHz |
| |
| const uint64_t kUartBaudrate = 1 * 1000 * 1000; // 1Mbps |
| |
| const uint32_t kUartNCOValue = |
| CALCULATE_UART_NCO(kUartBaudrate, kClockFreqPeripheralHz); |
| |
| const uint32_t kUartTxFifoCpuCycles = |
| CALCULATE_UART_TX_FIFO_CPU_CYCLES(kUartBaudrate, kClockFreqCpuHz); |
| |
| const uint32_t kAstCheckPollCpuCycles = |
| CALCULATE_AST_CHECK_POLL_CPU_CYCLES(kClockFreqCpuHz); |
| |
| // Defined in `hw/top_earlgrey/dv/env/chip_env_pkg.sv` |
| const uintptr_t kDeviceTestStatusAddress = 0x503ffff8; |
| |
| // Defined in `hw/top_earlgrey/dv/env/chip_env_pkg.sv` |
| const uintptr_t kDeviceLogBypassUartAddress = 0x503ffffc; |
| |
| const bool kJitterEnabled = false; |
| |
| void device_fpga_version_print(void) {} |