Run software tests from raw otp

1. Start the test with raw otp
2. Use jtag to program lc state to TestUnlocked0
3. Apply reset to boot up the chip
4. Run chip_sw_uart_tx_rx as an example

Change-Id: Ifc1c35ec153147bda969c20128a439140aa53b6f

hw/top_matcha/dv/chip_sim_cfg.hjson

diff --git a/hw/top_matcha/dv/chip_sim_cfg.hjson b/hw/top_matcha/dv/chip_sim_cfg.hjson
index 7d7f041..6fcc122 100644
--- a/hw/top_matcha/dv/chip_sim_cfg.hjson
+++ b/hw/top_matcha/dv/chip_sim_cfg.hjson
@@ -702,6 +702,13 @@
       reseed: 5
     }
     {
+      name: chip_sw_uart_tx_rx_lc_test
+      uvm_test_seq: chip_sw_uart_tx_rx_vseq
+      sw_images: ["//sw/device/tests/sim_dv:uart_tx_rx_test:1:matcha"]
+      en_run_modes: ["sw_test_mode_test_rom"]
+      run_opts: ["+uart_idx=0", "+calibrate_usb_clk=1", "+raw_otp_jtag=1", "+use_otp_image=OtpTypeLcStRaw"]
+    }
+    {
       name: chip_sw_uart_tx_rx_idx1
       uvm_test_seq: chip_sw_uart_tx_rx_vseq
       sw_images: ["//sw/device/tests/sim_dv:uart_tx_rx_test:1"]
@@ -2211,6 +2218,7 @@
         "chip_sw_sysrst_ctrl_ulp_z3_wakeup",
         "chip_sw_uart_smoketest",
         "chip_sw_uart_tx_rx",
+        "chip_sw_uart_tx_rx_lc_test",
         "chip_tap_straps_dev",
         "chip_tap_straps_rma",
       ]
@@ -2340,6 +2348,7 @@
         "chip_sw_sysrst_ctrl_reset",
         "chip_sw_sysrst_ctrl_ulp_z3_wakeup",
         "chip_sw_uart_tx_rx",
+        "chip_sw_uart_tx_rx_lc_test",
         "chip_tap_straps_dev",
         "chip_tap_straps_prod",
         "chip_tap_straps_rma",

hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv

diff --git a/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv b/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv
index 1f6851d..ee22eb2 100644
--- a/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv
+++ b/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv
@@ -12,12 +12,20 @@
 
   `uvm_object_new
 
+  bit raw_otp_jtag;
+
   virtual task pre_start();
     super.pre_start();
     set_and_release_sw_strap_nonblocking();
     // Disable mem checks in scoreboard - it does not factor in memory scrambling.
     cfg.en_scb_mem_chk = 1'b0;
 
+    raw_otp_jtag = 1'b0;
+    void'($value$plusargs("raw_otp_jtag=%0d", raw_otp_jtag));
+    if (raw_otp_jtag) begin
+      cfg.chip_vif.tap_straps_if.drive(JtagTapLc);
+    end
+
     // Undriven gpio pins will cause x values in u_gpio.data_in when connected
     // with MIO pads in pinmux
     // TODO(b/287479608): Add more X checkers and report error immediately
@@ -234,10 +242,24 @@
     cfg.mem_bkdr_util_h[mem].write39integ(addr_scr & addr_mask, data_scr ^ flip_bits);
   endfunction
 
+  virtual task apply_reset(string kind = "HARD");
+    super.apply_reset();
+
+    if (raw_otp_jtag) begin
+      set_otp_creator_sw_cfg_rom_exec_en(1);
+    end
+  endtask
+
   virtual task body();
     cfg.sw_test_status_vif.set_num_iterations(num_trans);
     // Initialize the CPU to kick off the sw test. TODO: Should be called in pre_start() instead.
     cpu_init();
+
+    if (raw_otp_jtag) begin
+      wait_lc_ready(1);
+      jtag_lc_state_transition(DecLcStRaw, DecLcStTestUnlocked0);
+      apply_reset();
+    end
   endtask
 
   virtual task post_start();