sw/device/lib/testing/test_rom/BUILD

# Copyright 2023 Google LLC.
# Copyright lowRISC contributors.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0

load("@lowrisc_opentitan//rules:autogen.bzl", "autogen_chip_info")
load("@lowrisc_opentitan//rules:linker.bzl", "ld_library")
load("//rules:matcha.bzl", "NEXUS_CORE_TARGETS", "OPENTITAN_CPU", "opentitan_rom_binary")
load("//rules:targets.bzl", "get_targets")

package(default_visibility = ["//visibility:public"])

TARGETS = get_targets()

autogen_chip_info(
    name = "chip_info",
    version = "//util:matcha_version_file",
)

[ld_library(
    name = "{}_linker_script".format(target),
    script = "{}_test_rom.ld".format(target),
    deps = [
        "//hw/top_{}/sw/autogen:top_{}_memory".format(target, target),
        "@lowrisc_opentitan//sw/device:info_sections",
        "@lowrisc_opentitan//sw/device/silicon_creator/lib/base:static_critical_sections",
    ],
) for target in TARGETS]

[opentitan_rom_binary(
    name = "{}_test_rom".format(target),
    top_target = target,
    deps = [
        ":{}_linker_script".format(target),
        ":{}_test_rom_otp_lib".format(target),
    ],
) for target in TARGETS]

[opentitan_rom_binary(
    name = "{}_test_rom_no_otp".format(target),
    srcs = [
        "test_rom.c",
        "test_rom_start.S",
    ],
    defines = ["OTP_IS_RAM"],
    top_target = target,
    deps = [
        ":{}_linker_script".format(target),
        ":{}_test_rom_lib".format(target),
        "//sw/device/silicon_creator/rom:bootstrap_no_otp",
        "@lowrisc_opentitan//sw/device/lib/crt",
    ],
) for target in TARGETS]

[cc_library(
    name = "{}_test_rom_otp_lib".format(target),
    srcs = [
        "test_rom.c",
        "test_rom_start.S",
    ],
    deps = [
        ":{}_test_rom_lib".format(target),
        "//sw/device/silicon_creator/rom:bootstrap",
        "@lowrisc_opentitan//sw/device/lib/crt",
    ],
) for target in TARGETS]

[cc_library(
    name = "{}_test_rom_lib".format(target),
    srcs = [
    ],
    target_compatible_with = [OPENTITAN_CPU],
    deps = [
        ":chip_info",
        "//hw/top_{}:ast_regs".format(target),
        "//hw/top_{}:clkmgr_regs".format(target),
        "//hw/top_{}/sw:top_{}".format(target, target),
        "//hw/top_{}/ip/flash_ctrl/data/autogen:flash_ctrl_regs".format(target),
        "//hw/top_{}/ip/sensor_ctrl/data:sensor_ctrl_regs".format(target),
        "//sw/device/lib:spi_flash",
        "//sw/device/lib/dif:pinmux",
        "//sw/device/lib/testing:pinmux_testutils",
        "@lowrisc_opentitan//hw/ip/csrng/data:csrng_regs",
        "@lowrisc_opentitan//hw/ip/edn/data:edn_regs",
        "@lowrisc_opentitan//hw/ip/entropy_src/data:entropy_src_regs",
        "@lowrisc_opentitan//hw/ip/otp_ctrl/data:otp_ctrl_regs",
        "@lowrisc_opentitan//hw/ip/sram_ctrl/data:sram_ctrl_regs",
        "@lowrisc_opentitan//sw/device/lib/arch:device",
        "@lowrisc_opentitan//sw/device/lib/base:abs_mmio",
        "@lowrisc_opentitan//sw/device/lib/base:bitfield",
        "@lowrisc_opentitan//sw/device/lib/base:mmio",
        "@lowrisc_opentitan//sw/device/lib/dif:clkmgr",
        "@lowrisc_opentitan//sw/device/lib/dif:flash_ctrl",
        "@lowrisc_opentitan//sw/device/lib/dif:gpio",
        "@lowrisc_opentitan//sw/device/lib/dif:hmac",
        "@lowrisc_opentitan//sw/device/lib/dif:rstmgr",
        "@lowrisc_opentitan//sw/device/lib/dif:rv_core_ibex",
        "@lowrisc_opentitan//sw/device/lib/dif:spi_device",
        "@lowrisc_opentitan//sw/device/lib/dif:uart",
        "@lowrisc_opentitan//sw/device/lib/runtime:hart",
        "@lowrisc_opentitan//sw/device/lib/runtime:log",
        "@lowrisc_opentitan//sw/device/lib/runtime:print",
        "@lowrisc_opentitan//sw/device/lib/testing:flash_ctrl_testutils",
        "@lowrisc_opentitan//sw/device/lib/testing/test_framework:check",
        "@lowrisc_opentitan//sw/device/lib/testing/test_framework:status",
        "@lowrisc_opentitan//sw/device/silicon_creator/lib:manifest",
        "@lowrisc_opentitan//sw/device/silicon_creator/lib/base:sec_mmio",
        "@lowrisc_opentitan//sw/device/silicon_creator/lib/base:static_critical_boot_measurements",
        "@lowrisc_opentitan//sw/device/silicon_creator/lib/base:static_critical_epmp_state",
        "@lowrisc_opentitan//sw/device/silicon_creator/lib/base:static_critical_sec_mmio",
        "@lowrisc_opentitan//sw/device/silicon_creator/lib/drivers:flash_ctrl",
        "@lowrisc_opentitan//sw/device/silicon_creator/lib/drivers:retention_sram",
    ],
) for target in TARGETS]

[ld_library(
    name = "{}_puppeteer_linker_script".format(target),
    script = "{}_puppeteer_rom.ld".format(target),
    deps = [
        "//hw/top_{}/sw/autogen:top_{}_memory".format(target, target),
    ],
) for target in TARGETS]

# Only build for nexus FPGA.
[opentitan_rom_binary(
    name = "{}_puppeteer_rom".format(target),
    per_device_deps = {
        "fpga_nexus": [NEXUS_CORE_TARGETS.get("secure_core")],
    },
    top_target = target,
    deps = [
        ":{}_puppeteer_linker_script".format(target),
        ":{}_puppeteer_rom_lib".format(target),
    ],
) for target in TARGETS]

[cc_library(
    name = "{}_puppeteer_rom_lib".format(target),
    srcs = [
        "puppeteer.cc",
        "puppeteer_rom.cc",
        "test_rom_start.S",
    ],
    hdrs = [
        "puppeteer.h",
    ],
    copts = [
        "-nostdlib",
        "-DPUPPETEER_ROM",
        "-Wno-unused-result",
    ],
    target_compatible_with = [OPENTITAN_CPU],
    deps = [
        "//hw/top_{}:ast_regs".format(target),
        "//hw/top_{}:clkmgr_regs".format(target),
        "//hw/top_{}:pinmux_regs".format(target),
        "//hw/top_{}/sw:top_{}".format(target, target),
        "//hw/top_{}/ip/sensor_ctrl/data:sensor_ctrl_regs".format(target),
        "//sw/device/lib/testing/test_rom/puppeteer_utils",
        "@lowrisc_opentitan//hw/ip/csrng/data:csrng_regs",
        "@lowrisc_opentitan//hw/ip/edn/data:edn_regs",
        "@lowrisc_opentitan//hw/ip/entropy_src/data:entropy_src_regs",
        "@lowrisc_opentitan//hw/ip/sram_ctrl/data:sram_ctrl_regs",
        "@lowrisc_opentitan//sw/device/lib/base:memory",
        "@lowrisc_opentitan//sw/device/lib/base:multibits",
        "@lowrisc_opentitan//sw/device/lib/crt",
        "@lowrisc_opentitan//sw/device/lib/dif:flash_ctrl",
        "@lowrisc_opentitan//sw/device/lib/dif:spi_host",
        "@lowrisc_opentitan//sw/device/silicon_creator/lib:manifest",
        "@lowrisc_opentitan//sw/device/silicon_creator/lib/drivers:flash_ctrl",
    ],
) for target in TARGETS]

# Only build for CHERIoT targets. Requires that bazel be invoked with
# --config=cheriot-baremetal --copt=-D_CHERIOT_BAREMETAL_=1
# so that all dependencies use those options.
opentitan_rom_binary(
    name = "test_rom_no_otp_cheri",
    srcs = [
        "test_rom_cheri.c",
        "test_rom_start_cheri.S",
        # XXX move to opentitan/sw/device/lib/crt?
        "crt_cheri.S",
    ],
    defines = ["OTP_IS_RAM"],
    # NB: fpga_nexus is used for renode sims
    per_device_deps = {
        "fpga_nexus": [NEXUS_CORE_TARGETS.get("secure_core")],
    },
    tags = [
        "cheri",
    ],
    visibility = ["//visibility:private"],
    deps = [
        ":baremetal_lib",
        ":linker_script_cheri",
        ":sencha_test_rom_lib",
        "//sw/device/silicon_creator/rom:bootstrap_no_otp",
    ],
)

cc_library(
    name = "baremetal_lib",
    hdrs = [
        "cheriot-baremetal.h",
    ],
)

ld_library(
    name = "linker_script_cheri",
    script = "test_rom_cheri.ld",
    tags = [
        "cheri",
    ],
    visibility = ["//visibility:private"],
    deps = [
        "//hw/top_matcha/sw/autogen:top_matcha_memory_cheri",
        "@lowrisc_opentitan//sw/device:info_sections",
        "@lowrisc_opentitan//sw/device/silicon_creator/lib/base:static_critical_sections",
    ],
)