[dbg] Add matcha-specific config files

-target/google-matcha.cfg currently used for multi-hart debug on Nexus
with template setup for loading 2 elfs onto the SC (thread 1) and SMC
(thread 2)
--> e.g. riscv-unknown-elf-gdb -x gdb_setup_example.txt
--board/ and interface/ used in future for gdb verilator sim

Change-Id: I9e41050404e8bd35a8a3f2cd6c7239b8567c84e5

util/openocd/board/google-matcha-verilator.cfg

diff --git a/util/openocd/board/google-matcha-verilator.cfg b/util/openocd/board/google-matcha-verilator.cfg
new file mode 100644
index 0000000..e18f5a8
--- /dev/null
+++ b/util/openocd/board/google-matcha-verilator.cfg
@@ -0,0 +1,12 @@
+# Copyright Google 2023 LLC.
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Board configuration file: the Earl Grey chip in a Verilator simulation
+
+source [find interface/sim-jtagdpi.cfg]
+source [find target/google-matcha.cfg]
+
+# Increase timeouts in simulation
+riscv set_command_timeout_sec 120

util/openocd/interface/sim-jtagdpi.cfg

diff --git a/util/openocd/interface/sim-jtagdpi.cfg b/util/openocd/interface/sim-jtagdpi.cfg
new file mode 100644
index 0000000..d229292
--- /dev/null
+++ b/util/openocd/interface/sim-jtagdpi.cfg
@@ -0,0 +1,11 @@
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# "JTAG adapter" for simulation, exposed to OpenOCD through a TCP socket
+# speaking the remote_bitbang protocol. The adapter is implemented as
+# SystemVerilog DPI module.
+
+adapter driver remote_bitbang
+remote_bitbang_port 44853
+remote_bitbang_host localhost

util/openocd/target/gdb_setup_example.txt

diff --git a/util/openocd/target/gdb_setup_example.txt b/util/openocd/target/gdb_setup_example.txt
new file mode 100644
index 0000000..a3797eb
--- /dev/null
+++ b/util/openocd/target/gdb_setup_example.txt
@@ -0,0 +1,6 @@
+target extended-remote :3333
+add-symbol-file bazel-out/k8-fastbuild-ST-97f470ee3b14/bin/sw/device/examples/hello_world_multicore/hello_world_multicore_sc_embedded_fpga_nexus.elf
+thread 2
+add-symbol-file bazel-out/k8-fastbuild-ST-97f470ee3b14/bin/sw/device/examples/hello_world_multicore/hello_world_multicore_smc_fpga_nexus.elf
+thread 1
+info threads

util/openocd/target/google-matcha.cfg

diff --git a/util/openocd/target/google-matcha.cfg b/util/openocd/target/google-matcha.cfg
new file mode 100644
index 0000000..759658e
--- /dev/null
+++ b/util/openocd/target/google-matcha.cfg
@@ -0,0 +1,45 @@
+# Copyright 2023 Google LLC.
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Target configuration for the lowRISC "Earl Grey" chip
+
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
+   set  _CHIPNAME riscv
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x04f5484d
+}
+
+jtag newtap $_CHIPNAME tap -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.tap
+
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME -rtos hwthread
+target create $_TARGETNAME.1 riscv -chain-position $_TARGETNAME -coreid 1
+
+# Configure work area in on-chip SRAM
+$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 1000 -work-area-backup 0
+$_TARGETNAME.1 configure -work-area-phys 0x80001000 -work-area-size 1000 -work-area-backup 0
+
+# This chip implements system bus access, use it.
+# Accessing the memory through the system bus is faster than through
+# instruction feeding.
+riscv set_prefer_sba on
+
+# Be verbose about GDB errors
+gdb_report_data_abort enable
+gdb_report_register_access_error enable
+
+# Always use hardware breakpoints. Since we don't use `flash bank` commands,
+# OpenOCD won't provide a memory map to GDB. This means that GDB isn't be aware
+# that the code resides in a read-only memory, and therefore should use hardware
+# breakpoints. This setting makes OpenOCD convert the software breakpoints into
+# hardware ones.
+gdb_breakpoint_override hard