I2S RX Fix Missing Else Statement I2S RX fix missing else statement syntax error Change-Id: I6b435bea2ad6c9648b234a743e90d5dd05df8978
diff --git a/hw/top_matcha/ip/i2s/rtl/i2s_rx.sv b/hw/top_matcha/ip/i2s/rtl/i2s_rx.sv index 74ad7a3..d62b762 100644 --- a/hw/top_matcha/ip/i2s/rtl/i2s_rx.sv +++ b/hw/top_matcha/ip/i2s/rtl/i2s_rx.sv
@@ -88,12 +88,13 @@ end end - // Bits were clocked on the line falling edge of clock. Latch data in on rising. + // Clock in data in on rising edge. always_ff @(posedge sclk_o or negedge rst_ni) begin if (!rst_ni) begin shift_reg <= '0; + end else begin + shift_reg <= {shift_reg[WordWidth-2:0], serial_data_i}; end - shift_reg <= {shift_reg[WordWidth-2:0], serial_data_i}; end endmodule