Resolve false timeout bug in dv testbench and revise dv tests Kelvin tests are not revised yet and removed from nightly regression. Bug:287644985 Change-Id: I3e1955ef1933e632b6bb7e79d38a07dd53d726de
diff --git a/hw/top_matcha/dv/chip_sim_cfg.hjson b/hw/top_matcha/dv/chip_sim_cfg.hjson index 620b47e..164c73a 100644 --- a/hw/top_matcha/dv/chip_sim_cfg.hjson +++ b/hw/top_matcha/dv/chip_sim_cfg.hjson
@@ -2049,6 +2049,7 @@ ] } { + // TODO(b/287644985): Track the dv tests to be implemented. name: edacloud_nightly tests: [ "chip_plic_all_irqs", @@ -2058,7 +2059,6 @@ "chip_sw_alert_handler_ping_timeout", "chip_sw_alert_test", "chip_sw_aon_timer_smoketest", - "chip_sw_atomics_test", "chip_sw_cam_ctrl_test", "chip_sw_clkmgr_off_peri", "chip_sw_clkmgr_smoketest", @@ -2081,7 +2081,6 @@ "chip_sw_otbn_smoketest", "chip_sw_otp_ctrl_escalation", "chip_sw_otp_ctrl_smoketest", - "chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup", "chip_sw_rom_ctrl_integrity_check", "chip_sw_rstmgr_smoketest", "chip_sw_rstmgr_sw_req", @@ -2097,13 +2096,10 @@ "chip_sw_smc_ctrl_test", "chip_sw_smc_env_test", "chip_sw_smc_i2s_rx_test", - "chip_sw_smc_i2s_tx_test", "chip_sw_smc_interrupt_boundary_test", "chip_sw_smc_isp_wrapper_irq_test", "chip_sw_smc_isp_wrapper_test", "chip_sw_smc_isp_wrapper_tpg_64_64_test", - "chip_sw_smc_kelvin_checksum_test", - "chip_sw_smc_kelvin_hello_test", "chip_sw_smc_lsu_interrupt_boundary_test", "chip_sw_smc_lsu_page_boundary_test", "chip_sw_smc_ml_sram_smoketest", @@ -2111,7 +2107,6 @@ "chip_sw_smc_page_boundary_test", "chip_sw_smc_rv_timer_test", "chip_sw_smc_supervisor_mode_test", - "chip_sw_smc_tlul_mailbox_test", "chip_sw_smc_virtual_memory_test", "chip_sw_spi_device_tx_rx", "chip_sw_sram_ctrl_smoketest",
diff --git a/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv b/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv index 264736d..ad8fdc2 100644 --- a/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv +++ b/hw/top_matcha/dv/env/seq_lib/chip_sw_base_vseq.sv
@@ -258,27 +258,23 @@ // Print pass / fail message to the log. virtual function void log_sw_test_status(); - if(cfg.sw_test_status_vif.sw_test_done) begin - case (cfg.sw_test_status_vif.sw_test_status) - SwTestStatusPassed: `uvm_info(`gfn, "SW TEST PASSED!", UVM_LOW) - SwTestStatusFailed: `uvm_error(`gfn, "SW TEST FAILED!") - default: begin - // If the SW test has not reached the passed / failed state, then it timed out. - `uvm_error(`gfn, $sformatf("SW TEST TIMED OUT. STATE: %0s, TIMEOUT = %0d ns\n", - cfg.sw_test_status_vif.sw_test_status.name(), cfg.sw_test_timeout_ns)) - end - endcase + if(cfg.sw_test_status_vif.sw_test_done || cfg.sw_smc_test_status_vif.sw_test_done) begin + if(cfg.sw_test_status_vif.sw_test_done) begin + case (cfg.sw_test_status_vif.sw_test_status) + SwTestStatusPassed: `uvm_info(`gfn, "[SEC] SW TEST PASSED!", UVM_LOW) + SwTestStatusFailed: `uvm_error(`gfn, "[SEC] SW TEST FAILED!") + endcase + end + if(cfg.sw_smc_test_status_vif.sw_test_done) begin + case (cfg.sw_smc_test_status_vif.sw_test_status) + SwTestStatusPassed: `uvm_info(`gfn, "[SMC] SW TEST PASSED!", UVM_LOW) + SwTestStatusFailed: `uvm_error(`gfn, "[SMC] SW TEST FAILED!") + endcase + end end - if(cfg.sw_smc_test_status_vif.sw_test_done) begin - case (cfg.sw_smc_test_status_vif.sw_test_status) - SwTestStatusPassed: `uvm_info(`gfn, "SW TEST PASSED!", UVM_LOW) - SwTestStatusFailed: `uvm_error(`gfn, "SW TEST FAILED!") - default: begin - // If the SW test has not reached the passed / failed state, then it timed out. - `uvm_error(`gfn, $sformatf("SW TEST TIMED OUT. STATE: %0s, TIMEOUT = %0d ns\n", + else begin + `uvm_error(`gfn, $sformatf("SW TEST TIMED OUT. STATE: %0s, TIMEOUT = %0d ns\n", cfg.sw_smc_test_status_vif.sw_test_status.name(), cfg.sw_test_timeout_ns)) - end - endcase end endfunction