Fix Kelvin FPGA interrupt reset

Change-Id: I65c9bef863694b135a4e77edd2054f63ee773157

sw/device/tests/kelvin/fpga_tests/kelvin_test_sc.c

diff --git a/sw/device/tests/kelvin/fpga_tests/kelvin_test_sc.c b/sw/device/tests/kelvin/fpga_tests/kelvin_test_sc.c
index b49225a..0031960 100644
--- a/sw/device/tests/kelvin/fpga_tests/kelvin_test_sc.c
+++ b/sw/device/tests/kelvin/fpga_tests/kelvin_test_sc.c
@@ -89,8 +89,13 @@
     mmio_region_write32(base_addr, ML_TOP_CTRL_REG_OFFSET,
                         ML_TOP_CTRL_REG_RESVAL | (1 << ML_TOP_CTRL_FREEZE_BIT));
     // Write 1 to clear INTR_STATE
-    mmio_region_write32(base_addr, ML_TOP_INTR_STATE_REG_OFFSET, 0x1);
-    memset(kelvin_bin_name, 0, sizeof(kelvin_bin_name));
+    mmio_region_write32(base_addr, ML_TOP_INTR_STATE_REG_OFFSET, intr_state);
+    intr_state = mmio_region_read32(base_addr, ML_TOP_INTR_STATE_REG_OFFSET);
+    CHECK(
+        intr_state == 0,
+        "ML_TOP_Core offset 0 INTR_STATE  read  again - Expected: 0 | Actual: "
+        "0x%x",
+        intr_state);
   }
   LOG_INFO("Total test: %d, failed test: %d", test_num, failed_test);
   if (failed_test == 0) {