[smc/hw] Allow async exceptions mid-SC.W

- Allow graceful interrupting while waiting for data_rvalid from the bus

Change-Id: If1412b7b7fa8f878647f3a55f64e620e51c9cc6a

hw/top_matcha/ip/smc/rtl/smc_id_stage.sv

diff --git a/hw/top_matcha/ip/smc/rtl/smc_id_stage.sv b/hw/top_matcha/ip/smc/rtl/smc_id_stage.sv
index a1257bc..b0666c7 100644
--- a/hw/top_matcha/ip/smc/rtl/smc_id_stage.sv
+++ b/hw/top_matcha/ip/smc/rtl/smc_id_stage.sv
@@ -772,7 +772,7 @@
   always_comb begin
     amo_outstanding_res_d = amo_outstanding_res_q;
     amo_sc_success_d = id_ptw_active_i ? amo_sc_success_q : 1'b0;
-    amo_rf_success_d = data_rvalid_i ? 1'b0 : amo_rf_success_q;
+    amo_rf_success_d = data_rvalid_i ? 1'b0 : (amo_rf_success_q & instr_valid_i);
 
     if (lsu_req) begin
       if (amo_lr) begin