Merge "Support DV gate-level simulation"

hw/top_matcha/dv/env/chip_common_pkg.sv

diff --git a/hw/top_matcha/dv/env/chip_common_pkg.sv b/hw/top_matcha/dv/env/chip_common_pkg.sv
index 33c3192..a7b9be1 100644
--- a/hw/top_matcha/dv/env/chip_common_pkg.sv
+++ b/hw/top_matcha/dv/env/chip_common_pkg.sv
@@ -18,11 +18,10 @@
   // Buffer is half of SPI_DEVICE Dual Port SRAM
   parameter dv_utils_pkg::uint SPI_FRAME_BYTE_SIZE = spi_device_reg_pkg::SPI_DEVICE_BUFFER_SIZE/2;
 
-  // SW constants - use unmapped address space with at least 32 bytes.
-  parameter bit [top_pkg::TL_AW-1:0] SW_DV_START_ADDR = tl_main_pkg::ADDR_SPACE_RV_CORE_IBEX_SEC__CFG +
-      rv_core_ibex_reg_pkg::RV_CORE_IBEX_DV_SIM_WINDOW_OFFSET;
-  parameter bit [top_pkg::TL_AW-1:0] SW_DV_SMC_START_ADDR = tl_smc_pkg::ADDR_SPACE_RV_CORE_IBEX_SMC__CFG +
-      rv_core_ibex_reg_pkg::RV_CORE_IBEX_DV_SIM_WINDOW_OFFSET;
+  // SW constants - map Matcha dv addresses to an memory space which could be
+  // accessed by both secure and SMC cores.
+  parameter bit [top_pkg::TL_AW-1:0] SW_DV_START_ADDR = 32'h503f_fff8;
+  parameter bit [top_pkg::TL_AW-1:0] SW_DV_SMC_START_ADDR = 32'h503f_fff0;
 
   parameter bit [top_pkg::TL_AW-1:0] SW_DV_TEST_STATUS_ADDR = SW_DV_START_ADDR + 0;
   parameter bit [top_pkg::TL_AW-1:0] SW_DV_LOG_ADDR         = SW_DV_START_ADDR + 4;

hw/top_matcha/dv/tb/tb.sv

diff --git a/hw/top_matcha/dv/tb/tb.sv b/hw/top_matcha/dv/tb/tb.sv
index 7d61ddb..4403819 100644
--- a/hw/top_matcha/dv/tb/tb.sv
+++ b/hw/top_matcha/dv/tb/tb.sv
@@ -163,7 +163,7 @@
   sim_sram u_sim_sram (
     .clk_i    (sel_sim_sram ? `CPU_HIER.clk_i : 1'b0),
     .rst_ni   (`CPU_HIER.rst_ni),
-    .tl_in_i  (tlul_pkg::tl_h2d_t'(`CPU_HIER.u_tlul_req_buf.out_o)),
+    .tl_in_i  (tlul_pkg::tl_h2d_t'(`CPU_HIER.fifo_d.tl_h_i)),
     .tl_in_o  (),
     .tl_out_o (),
     .tl_out_i ()
@@ -173,7 +173,6 @@
     void'($value$plusargs("en_sim_sram=%0b", en_sim_sram));
     if (!dut.chip_if.stub_cpu && en_sim_sram) begin
       `SIM_SRAM_IF.start_addr = SW_DV_START_ADDR;
-      force `CPU_HIER.u_tlul_rsp_buf.in_i = u_sim_sram.tl_in_o;
     end
   end
 
@@ -206,7 +205,7 @@
   sim_sram u_sim_smc_sram (
     .clk_i    (sel_sim_smc_sram ? `SMC_CPU_HIER.clk_i : 1'b0),
     .rst_ni   (`SMC_CPU_HIER.rst_ni),
-    .tl_in_i  (tlul_pkg::tl_h2d_t'(`SMC_CPU_HIER.u_tlul_req_buf.out_o)),
+    .tl_in_i  (tlul_pkg::tl_h2d_t'(`SMC_CPU_HIER.fifo_d.tl_h_i)),
     .tl_in_o  (),
     .tl_out_o (),
     .tl_out_i ()
@@ -216,7 +215,6 @@
     void'($value$plusargs("en_sim_smc_sram=%0b", en_sim_smc_sram));
     if (!stub_smc && en_sim_smc_sram) begin
       `SIM_SMC_SRAM_IF.start_addr = SW_DV_SMC_START_ADDR;
-      force `SMC_CPU_HIER.u_tlul_rsp_buf.in_i = u_sim_smc_sram.tl_in_o;
     end
   end
 

rules/matcha.bzl

diff --git a/rules/matcha.bzl b/rules/matcha.bzl
index 9d87d2c..ac14bf5 100644
--- a/rules/matcha.bzl
+++ b/rules/matcha.bzl
@@ -39,7 +39,7 @@
 }
 
 DV_CORE_TARGETS = {
-    "secure_core": "@lowrisc_opentitan//sw/device/lib/arch:sim_dv",
+    "secure_core": "//sw/device/lib/arch:sim_dv",
     "smc": "//sw/device/lib/arch:smc_sim_dv",
 }
 

sw/device/lib/arch/BUILD

diff --git a/sw/device/lib/arch/BUILD b/sw/device/lib/arch/BUILD
index b0bc154..9717273 100644
--- a/sw/device/lib/arch/BUILD
+++ b/sw/device/lib/arch/BUILD
@@ -11,6 +11,14 @@
 )
 
 cc_library(
+    name = "sim_dv",
+    srcs = ["device_sim_dv.c"],
+    deps = [
+        ":device",
+    ],
+)
+
+cc_library(
     name = "smc_sim_dv",
     srcs = ["device_smc_sim_dv.c"],
     deps = [

sw/device/lib/arch/device_sim_dv.c

diff --git a/sw/device/lib/arch/device_sim_dv.c b/sw/device/lib/arch/device_sim_dv.c
new file mode 100644
index 0000000..3ab7c7d
--- /dev/null
+++ b/sw/device/lib/arch/device_sim_dv.c
@@ -0,0 +1,51 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+
+#include "sw/device/lib/arch/device.h"
+
+/**
+ * Device-specific symbol definitions for the Verilator device.
+ */
+
+const device_type_t kDeviceType = kDeviceSimDV;
+
+// TODO: DV testbench completely randomizes these. Need to add code to
+// retrieve these from a preloaded memory location set by the testbench.
+
+const uint64_t kClockFreqCpuMhz = 100;
+
+const uint64_t kClockFreqCpuHz = kClockFreqCpuMhz * 1000 * 1000;
+
+uint64_t to_cpu_cycles(uint64_t usec) { return usec * kClockFreqCpuMhz; }
+
+const uint64_t kClockFreqHiSpeedPeripheralHz = 96 * 1000 * 1000;  // 96MHz
+
+const uint64_t kClockFreqPeripheralHz = 24 * 1000 * 1000;  // 24MHz
+
+const uint64_t kClockFreqUsbHz = 48 * 1000 * 1000;  // 48MHz
+
+const uint64_t kClockFreqAonHz = 200 * 1000;  // 200kHz
+
+const uint64_t kUartBaudrate = 1 * 1000 * 1000;  // 1Mbps
+
+const uint32_t kUartNCOValue =
+    CALCULATE_UART_NCO(kUartBaudrate, kClockFreqPeripheralHz);
+
+const uint32_t kUartTxFifoCpuCycles =
+    CALCULATE_UART_TX_FIFO_CPU_CYCLES(kUartBaudrate, kClockFreqCpuHz);
+
+const uint32_t kAstCheckPollCpuCycles =
+    CALCULATE_AST_CHECK_POLL_CPU_CYCLES(kClockFreqCpuHz);
+
+// Defined in `hw/top_earlgrey/dv/env/chip_env_pkg.sv`
+const uintptr_t kDeviceTestStatusAddress = 0x503ffff8;
+
+// Defined in `hw/top_earlgrey/dv/env/chip_env_pkg.sv`
+const uintptr_t kDeviceLogBypassUartAddress = 0x503ffffc;
+
+const bool kJitterEnabled = false;
+
+void device_fpga_version_print(void) {}

sw/device/lib/arch/device_smc_sim_dv.c

diff --git a/sw/device/lib/arch/device_smc_sim_dv.c b/sw/device/lib/arch/device_smc_sim_dv.c
index ef7c4ac..a216caf 100644
--- a/sw/device/lib/arch/device_smc_sim_dv.c
+++ b/sw/device/lib/arch/device_smc_sim_dv.c
@@ -40,9 +40,9 @@
 const uint32_t kAstCheckPollCpuCycles =
     CALCULATE_AST_CHECK_POLL_CPU_CYCLES(kClockFreqCpuHz);
 
-const uintptr_t kDeviceTestStatusAddress = 0x54030080;
+const uintptr_t kDeviceTestStatusAddress = 0x503ffff0;
 
-const uintptr_t kDeviceLogBypassUartAddress = 0x54030084;
+const uintptr_t kDeviceLogBypassUartAddress = 0x503ffff4;
 
 const bool kJitterEnabled = false;
 

sw/device/lib/testing/test_framework/ottf_smc.ld

diff --git a/sw/device/lib/testing/test_framework/ottf_smc.ld b/sw/device/lib/testing/test_framework/ottf_smc.ld
index 067f8dd..ed83c13 100644
--- a/sw/device/lib/testing/test_framework/ottf_smc.ld
+++ b/sw/device/lib/testing/test_framework/ottf_smc.ld
@@ -17,10 +17,17 @@
 }
 
 /**
+ * Reserving space at the top of the RAM for DV verification.
+ */
+_dv_sim_window_size = 0x10;
+_dv_sim_window_end = ORIGIN(ram_smc) + LENGTH(ram_smc);
+_dv_sim_window_start = _dv_sim_window_end - _dv_sim_window_size;
+
+/**
  * Reserving space at the top of the RAM for the stack.
  */
 _stack_size = 0x2000;
-_stack_end = ORIGIN(ram_smc) + LENGTH(ram_smc);
+_stack_end = _dv_sim_window_start;
 _stack_start = _stack_end - _stack_size;
 
 /**
@@ -231,5 +238,13 @@
    __super_virtual_end = .;
   } > super_virtual
 
+  .stack ORIGIN(ram_smc) + LENGTH(ram_smc) - _stack_size - _dv_sim_window_size (NOLOAD) : ALIGN(4) {
+    __stack_start__ = .;
+    . += _stack_size;
+    . = ALIGN(4);
+    __stack_end__ = .;
+  } > ram_smc
+
+
   INCLUDE external/lowrisc_opentitan/sw/device/info_sections.ld
 }