| commit | fc8588e664831a90212a15eda6f394f5bd34f61b | [log] [tgz] |
|---|---|---|
| author | Tianyu Li <Tianyu.Li@verisilicon.com> | Fri Jan 10 13:30:14 2025 +0800 |
| committer | Derek Chow <derekjchow@google.com> | Tue Jan 21 13:33:29 2025 -0800 |
| tree | a3b730d47f8ab41637d6c7895b47fc4db7cbbc4e | |
| parent | 3514e3c00c38845fc58243f117430ce00bcf5563 [diff] |
fix overlap check problem for vwmaccus instruction Change-Id: If90f37ffd710d622525b2733112c3ffdac7dc979
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog