commit | f886ceb27a83758b9ba0033339f14ee346856812 | [log] [tgz] |
---|---|---|
author | Alex Van Damme <atv@google.com> | Wed Mar 06 12:53:12 2024 -0800 |
committer | Alex Van Damme <atv@google.com> | Wed Mar 06 13:49:10 2024 -0800 |
tree | 85b926d502c490590ade23210663b626094cbb1e | |
parent | d884f10a8bcbb16721b8368afef83fa79760538f [diff] |
Express operating mode as an enum - Previously, the machine vs. user mode was represented as a Bool -- convert this to a ChiselEnum, both for readability and potential extension in the future. Change-Id: I94387b4158385051a660924a3c766abacbf02f19
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog