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opensecura / hw / kelvin / f66f498a5203f2248b18f998b39b5c777833e94c
commitf66f498a5203f2248b18f998b39b5c777833e94c[log] [tgz]
authorDerek Chow <derekjchow@google.com>Sat Aug 30 17:56:13 2025 -0700
committerDerek Chow <derekjchow@google.com>Tue Sep 02 16:15:44 2025 -0700
tree500d60d7fabe94e0fb0bd512e022f5bd54f87c9e
parent7eb4dec16585041a9e44cef6820d8a8528c34d41 [diff]
Fault for reduction instructions when vstart != 0.

Change-Id: I69c8f28402e760971d23b63776bec3afd68110b7
13 files changed
tree: 500d60d7fabe94e0fb0bd512e022f5bd54f87c9e
  1. doc/
  2. examples/
  3. external/
  4. fpga/
  5. hdl/
  6. hw_sim/
  7. kelvin_test_utils/
  8. lib/
  9. platforms/
  10. rules/
  11. tests/
  12. third_party/
  13. toolchain/
  14. utils/
  15. .bazelrc
  16. .bazelversion
  17. .gitignore
  18. CONTRIBUTING.md
  19. LICENSE
  20. PREUPLOAD.cfg
  21. README.md
  22. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Getting Started

  • If you are hardware engineer looking to integrate Kelvin into your design, check out our integration guide.
  • If you are a software engineer looking to write code for Kelvin, start with this tutorial.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog