commit | ee09cb611c1027c0d44c4beaac985ed62e67f035 | [log] [tgz] |
---|---|---|
author | Derek Chow <derekjchow@google.com> | Thu Jul 31 15:35:56 2025 -0700 |
committer | Derek Chow <derekjchow@google.com> | Thu Jul 31 15:55:52 2025 -0700 |
tree | 0dae67be15e0ca71449e04ef3ece6462a8b31891 | |
parent | 6681f8ffeea44f9325d7dfb92f332a1efa0da827 [diff] |
Expose VL through Csr. Change-Id: I21b74e9b68c6617c5d70ebd54e0901e693ac8a21
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog