| commit | ed78b7032e8a152f93eada1443afee282901fed6 | [log] [tgz] |
|---|---|---|
| author | Alex Van Damme <atv@google.com> | Thu Jul 10 14:46:37 2025 -0700 |
| committer | Alex Van Damme <atv@google.com> | Mon Jul 14 13:16:57 2025 -0700 |
| tree | 56bb99e3df246d667a4a354de280e9ad16f5cb7c | |
| parent | d1a684d2e74855654d8d7add401fc27880240601 [diff] |
Separate cocotb build from test for Verilator - Create a verilator_cocotb_model rule -- this Verilates and compiles in the same configuration as cocotb normally does, and provides the simulation binary as an output. - Update verilator_cocotb_test to accept a model parameter instead of a verilog target -- this should be the aforementioned verilator_cocotb_model rule, and as a bonus this setup allows re-use of the simulation binaries between test cases. - Patch rules_hdl's cocotb_wrapper.py to not actually invoke the build -- we just override the path to the simulator binary, and run tests. - Due to the simulator binary running from a different location, the working directory changed and caused issues with the paths of test binaries. Use the Bazel runfiles library to find our programs, this should be less prone to breakage. Change-Id: I4f7fdf3501ac4cb4fac6bf8dc6dfe46375e63526
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog