commit | c7d94b7447c1b94fb37fbab489341931f03d1f8a | [log] [tgz] |
---|---|---|
author | Alex Van Damme <atv@google.com> | Tue Jul 15 11:39:53 2025 -0700 |
committer | Alex Van Damme <atv@google.com> | Wed Jul 16 16:27:08 2025 -0700 |
tree | 20fd5e7a10296a8d74b36b820c7cc9d2bdc49102 | |
parent | 0ecdd4b783ce05d4f008d9692ec84e8931e07bd8 [diff] |
Debug readability improvement - In both Chisel and Python, define some enumerations for magic numbers we've had floating around. Change-Id: I9ada036ab9be33f88bdcc606628ab3f9f0ed876f
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog