| commit | d81274eff3b567cf1ea28b6ec181889c1be5d1c6 | [log] [tgz] |
|---|---|---|
| author | Alex Van Damme <atv@google.com> | Thu Feb 29 15:46:34 2024 -0800 |
| committer | Alex Van Damme <atv@google.com> | Thu Feb 29 15:46:34 2024 -0800 |
| tree | f89dc076f33996683ab6fbf3f7509641502eb195 | |
| parent | aa9ac249270fa0efdecd86e8f8ed5aa3dc4b8c7e [diff] |
Set instructionLanes back to 4 - An increase to 8 was mistakenly in the previous commit. Change-Id: Ic7692b17d41e4c6881a3be1fa56567577ed30f1f
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog