| commit | d70ad097cb605327ac82410447808cf823d1a99d | [log] [tgz] |
|---|---|---|
| author | Pu Wang <pu.wang@verisilicon.com> | Tue Jan 07 15:46:44 2025 +0800 |
| committer | Derek Chow <derekjchow@google.com> | Thu Jan 16 11:13:02 2025 -0800 |
| tree | 90222f3be73dad89833fdfd7a6e2f382b4ad00ec | |
| parent | 3947ecb2a8e8b84e73c539a1bda84c4a954f6296 [diff] |
Update error check Change-Id: Id9e8061c488777e41a864bc4266d4b74098d2020
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog