commit | d1b068938f0abd949a248d9b50779aed1a11527f | [log] [tgz] |
---|---|---|
author | Matthew Wilson <mwilson@google.com> | Fri Oct 03 12:03:10 2025 -0700 |
committer | Matthew Wilson <mwilson@google.com> | Fri Oct 03 14:59:12 2025 -0700 |
tree | 8c550871b133077bed729f4aa6fac12ee2b79845 | |
parent | b4920b0f490206ba7cb4b584f04c6cf48ddfa3ad [diff] |
Increase sizes for tests that are timing out chisel_test was erasing test sizes causing all tests to be size medium Change-Id: I4338fab02f89d3b09ee3d36376b86ee135374a1b
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog