commit | cd4c5d1c3e9f63ed87c375b89532a9884de4cb98 | [log] [tgz] |
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author | Naveen Dodda <ndodda@google.com> | Sat Jul 12 05:20:51 2025 +0000 |
committer | Naveen Dodda <ndodda@google.com> | Wed Jul 30 18:19:41 2025 -0700 |
tree | a6006d558693155b8f269b7ebca0040a08d15db7 | |
parent | 4779c1da9c661c2974451969c60b7acb28348068 [diff] |
Matmul with Rvv intrinsics There is a bug in widen multiply and 32bit store with intrinsics So assembly instructions are used as a work around Change-Id: I6220b848dd942d493279ed857d3966b30d5ce1d0
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog