Refactoring core parts of toolchain_kelvin_v2

The following changes were made to upgrade dependencies and
refactor the build process.

* Upgrade RISC-V GNU Toolchian to git-branch `2025.08.29`
* Upgrade LLVM project to version `20.1.0`
* Simplify the build by removing the separate build step for `riscv-newlib`
  and update submodules.
* Update toolchain url and sha256 in `WORKSPACE` file to support new toolchain
* Update c++ toolchain configuration to include paths for GCC 15.1.0

Change-Id: I52b5cc37d47c2d672bd6c2b0f2b280883b37ac42
3 files changed
tree: 82138643b00b6eff115666e6ba6d312ed46bccc1
  1. doc/
  2. examples/
  3. external/
  4. fpga/
  5. hdl/
  6. hw_sim/
  7. kelvin_test_utils/
  8. lib/
  9. platforms/
  10. rules/
  11. tests/
  12. third_party/
  13. toolchain/
  14. utils/
  15. .bazelrc
  16. .bazelversion
  17. .gitignore
  18. CONTRIBUTING.md
  19. LICENSE
  20. PREUPLOAD.cfg
  21. README.md
  22. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Getting Started

  • If you are hardware engineer looking to integrate Kelvin into your design, check out our integration guide.
  • If you are a software engineer looking to write code for Kelvin, start with this tutorial.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog