| commit | 0a4e285d7a976c2b20d29d280680d2530a2ae20c | [log] [tgz] |
|---|---|---|
| author | Alex Van Damme <atv@google.com> | Thu Sep 19 17:01:40 2024 -0700 |
| committer | Alex Van Damme <atv@google.com> | Thu Sep 19 17:01:40 2024 -0700 |
| tree | 9c5e7c86699cff585cad23cc7f677512b35cd753 | |
| parent | bc5cc897af739624e71451d155e9fbdd585593df [diff] |
Remove AXI WID signal - WID is AXI3 only, we're AXI4. Change-Id: I7aa6d3a8f1a071d89454f1a927e1e6fdc3013e28
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog