| commit | 7e8caeaf604d973596e8dcf7227d303a6a9ab397 | [log] [tgz] |
|---|---|---|
| author | zsp_hw_cd_dev <beck.zhang@verisilicon.com> | Tue Nov 19 14:34:29 2024 +0800 |
| committer | Derek Chow <derekjchow@google.com> | Wed Nov 20 21:41:31 2024 +0000 |
| tree | 6f39f1348e73cc3611d5f3afe27e5846bd6a1a53 | |
| parent | 27a46372b9e1d5d143ff824d2f7daa65d652b260 [diff] |
Rename/move file(s) Change-Id: Ia03651341cb36e97c61ebca2e473b084db4134b7
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog